LTC1772ES6#TRMPBF Linear Technology, LTC1772ES6#TRMPBF Datasheet - Page 10
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LTC1772ES6#TRMPBF
Manufacturer Part Number
LTC1772ES6#TRMPBF
Description
IC DC/DC CNTRLR STEP-DWN SOT23-6
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet
1.LTC1772ES6TRMPBF.pdf
(12 pages)
Specifications of LTC1772ES6#TRMPBF
Internal Switch(s)
No
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
0.8 ~ 9.8 V
Current - Output
1A
Frequency - Switching
550kHz
Voltage - Input
2.5 ~ 9.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
TSOT-23-6, TSOT-6
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
Other names
LTC1772ES6#TRMPBFTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
APPLICATIONS
5. Transition losses apply to the external MOSFET and
Other losses including C
losses, and inductor core losses, generally account for
less than 2% total additional loss.
Foldback Current Limiting
As described in the Output Diode Selection, the worst-case
dissipation occurs with a short-circuited output when the
diode conducts the current limit value almost continu-
ously. To prevent excessive heating in the diode, foldback
current limiting can be added to reduce the current in
proportion to the severity of the fault.
Foldback current limiting is implemented by adding diodes
D
shown in Figure 5. In a hard short (V
LTC1772
10
FB1
0.4V, the loss increases from 0.5% to 8% as the load
current increases from 0.5A to 2A.
increase at higher operating frequencies and input
voltages. Transition losses can be estimated from:
Transition Loss = 2(V
and D
FB2
Figure 5. Foldback Current Limiting
between the output and the I
I
TH
LTC1772
/RUN
U
C
R
ITH
ITH
V
FB
INFORMATION
IN
U
IN
)
2
I
Figure 6. LTC1772 Layout Diagram (See PC Board Layout Checklist)
O(MAX)
and C
R2
R1
BOLD LINES INDICATE HIGH CURRENT PATHS
+
W
OUT
C
OUT
RSS
1
2
3
= 0V), the current
I
GND
V
TH
ESR dissipative
FB
(f)
1772 F05
/RUN
D
D
LTC1772
TH
FB1
FB2
/RUN pin as
SENSE
V
PGATE
OUT
U
V
IN
–
6
5
4
R
0.1µF
SENSE
will be reduced to approximately 50% of the maximum
output current.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1772. These items are illustrated graphically in the
layout diagram in Figure 6. Check the following in your
layout:
1. Is the Schottky diode closely connected between ground
2. Does the (+) plate of C
3. Is the input decoupling capacitor (0.1µF) connected
4. Connect the end of R
5. Is the trace from SENSE
6. Keep the switching node PGATE away from sensitive
7. Does the V
(Pin 2) and drain of the external MOSFET?
as closely as possible? This capacitor provides AC
current to the MOSFET.
closely between V
possible. The V
comparator.
kept short? Does the trace connect close to R
small signal nodes.
resistors? The resistive divider R1 and R2 must be
connected between the (+) plate of C
ground.
M1
+
C
IN
D1
FB
L1
pin connect directly to the feedback
IN
R1
IN
+
pin is the SENSE
1772 F06
(Pin 5) and ground (Pin 2)?
SENSE
C
IN
OUT
–
connect to the sense resistor
R2
(Pin 4) to the Sense resistor
as close to V
V
V
IN
OUT
+
OUT
of the current
IN
and signal
(Pin 5) as
SENSE
1772fb
?