IR3842WMTR1PBF International Rectifier, IR3842WMTR1PBF Datasheet

IC REG SYNC BUCK 4A 15-QFN

IR3842WMTR1PBF

Manufacturer Part Number
IR3842WMTR1PBF
Description
IC REG SYNC BUCK 4A 15-QFN
Manufacturer
International Rectifier
Series
SupIRBuck™r
Type
Step-Down (Buck)r
Datasheet

Specifications of IR3842WMTR1PBF

Internal Switch(s)
Yes
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
0.7 ~ 14.4 V
Current - Output
4A
Frequency - Switching
225kHz ~ 1.65MHz
Voltage - Input
1.5 ~ 16 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
15-PowerVQFN
Power - Output
640mW
Primary Input Voltage
16V
No. Of Outputs
1
Output Voltage
14.4V
Output Current
4A
No. Of Pins
15
Operating Temperature Range
-40°C To +125°C
Output Voltage Adjustable Max, Vout
14.4V
Rohs Compliant
Yes
Part Status
Preferred
Package
PQFN / 5 x 6
Circuit
Single Output
Iout (a)
4
Switch Freq (khz)
250 - 1500
Input Range (v)
1.5 - 16
Output Range (v)
0.7 - 0.9*Vin
Ocp Otp Uvlo Pre-bias Soft Start And
PGOOD + EN + SEQ + OVD
Design Tool
Yes
Server Storage
Yes
Routers Switches
Yes
Base Station Telecom
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
IR3842WMTR1PBFTR
SupIRBuck
Features
Applications
Rev 11.0
Greater than 95% Maximum Efficiency
Wide Input Voltage Range 1.5V to 16V
Wide Output Voltage Range 0.7V to 0.9*Vin
Continuous 4A Load Capability
Integrated Bootstrap-diode
High Bandwidth E/A for excellent transient
performance
Programmable Switching Frequency up to 1.5MHz
Programmable Over Current Protection
PGood output
Hiccup Current Limit
Precision Reference Voltage (0.7V, +/-1%)
Programmable Soft-Start
Enable Input with Voltage Monitoring Capability
Enhanced Pre-Bias Start-up
Seq input for Tracking applications
-40
Thermal Protection
Pin compatible option for 8A and 12A devices
5mm x 6mm Power QFN Package, 0.9 mm height
Server Applications
Storage Applications
Embedded Telecom Systems
Lead-free, halogen-free and RoHS compliant
o
C to 125
INTEGRATED 4A SYNCHRONOUS BUCK REGULATOR
1.5V <Vin<16V
PGood
4.5V <Vcc<5.5V
o
C operating junction temperature
TM
Seq
Vcc
Rt
SS/ SD
PGood
Fig. 1. Typical application diagram
Enable
Gnd
Vin
PGnd
Description
The IR3842W SupIRBuck
fully integrated and highly efficient DC/DC
synchronous Buck regulator. The MOSFETs co-
packaged with the on-chip PWM controller make
IR3842W a space-efficient solution, providing
accurate power delivery for low output voltage
applications.
IR3842W is a versatile regulator which offers
programmability of start up time, switching
frequency and current limit while operating in
wide input and output voltage range.
The switching frequency is programmable from
250kHz to 1.5MHz for an optimum solution.
It also features important protection functions,
such as Pre-Bias startup, hiccup current limit and
thermal shutdown to give required system level
security in the event of fault conditions.
OCSet
Comp
Boot
SW
Fb
Distributed Point of Load Power Architectures
Netcom Applications
Computing Peripheral Voltage Regulators
General DC-DC Converters
HIGHLY EFFICIENT
IR3842WMPbF
TM
is an easy-to-use,
Vo
1

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IR3842WMTR1PBF Summary of contents

Page 1

SupIRBuck TM INTEGRATED 4A SYNCHRONOUS BUCK REGULATOR Features • Greater than 95% Maximum Efficiency • Wide Input Voltage Range 1.5V to 16V • Wide Output Voltage Range 0.7V to 0.9*Vin • Continuous 4A Load Capability • Integrated Bootstrap-diode • High ...

Page 2

... PACKAGE INFORMATION 5mm x 6mm POWER QFN V IN Boot Enable ORDERING INFORMATION PACKAGE DESIGNATOR M M Rev 11 PGnd Gnd Seq FB COMP Gnd Rt SS OCSet PACKAGE PIN COUNT DESCRIPTION IR3842WMTRPbF 15 IR3842WMTR1PbF 15 IR3842WMPbF and -40 C θ θ PCB - V CC PGood PARTS PER REEL 4000 750 2 ...

Page 3

Block Diagram Fig. 2. Simplified block diagram of the IR3842W Rev 11.0 IR3842WMPbF 3 ...

Page 4

Pin Description Pin Name Sequence pin. Use two external resistors to set Simultaneous Power up 1 Seq sequencing. If this pin is not used connect to Vcc. Inverting input to the error amplifier. This pin is connected directly to the ...

Page 5

Recommended Operating Conditions Symbol Definition V Input Voltage in V Supply Voltage cc Boot to SW Supply Voltage V Output Voltage o I Output Current o Fs Switching Frequency T Junction Temperature j Electrical Specifications Unless otherwise specified, these specification ...

Page 6

Electrical Specifications (continued) Unless otherwise specified, these specifications apply over 4.5V< V Typical values are specified Parameter Symbol Oscillator Rt Voltage Frequency F S Ramp Amplitude Vramp Ramp Offset Ramp (os) Min Pulse Width Dmin(ctrl) ...

Page 7

Electrical Specifications (continued) Unless otherwise specified, these specification apply over 4.5V< V Typical values are specified Parameter SYM Thermal Shutdown Thermal Shutdown Hysteresis Power Good Power Good upper VPG(upper) Threshold Upper Threshold VPG(upper)_Dly Delay Power ...

Page 8

TYPICAL OPERATING CHARACTERISTICS (-40 Icc(Standby) 290 270 250 230 210 190 170 150 -40 - Temp[ C] FREQUENCY 550 540 530 520 510 500 490 480 470 460 450 -40 - ...

Page 9

Rdson of MOSFETs Over Temperature at Vcc= -40 -20 0 Rev 11 Temperature [°C] Sync-FET Ctrl-FET IR3842WMPbF 100 120 140 9 ...

Page 10

Typical Efficiency and Power Loss Curves Vin=12V, Vcc=5V, Io=0.5A-4A, F The table below shows the inductors used for each of the output voltages in the efficiency measurement. Vout (V) Vout (V) 0.9 0 1.1 1.1 1.2 1.2 1.5 ...

Page 11

Typical Efficiency and Power Loss Curves Vin=5V, Vcc=5V, Io=0.5A-4A, F The table below shows the inductors used for each of the output voltages in the efficiency measurement. Vout (V) Vout (V) 0.7 0.7 0.75 0.75 0.9 0 1.1 ...

Page 12

Circuit Description THEORY OF OPERATION Introduction The IR3842W uses a PWM voltage mode control scheme with external compensation to provide good noise immunity and maximum flexibility in selecting inductor values and capacitor types. The switching frequency is programmable from 250kHz ...

Page 13

Fig. 3c. Recommended startup sequence, Sequenced operation Pre-Bias Startup IR3842W is able to start up into pre-charged output, which prevents oscillation disturbances of the output voltage. The output starts in asynchronous fashion and keeps the synchronous MOSFET off until the ...

Page 14

Operating Frequency The switching frequency can be programmed between 250kHz – 1500kHz by connecting an external resistor from R pin to Gnd. Table 1 t tabulates the oscillator frequency versus R Table 1. Switching Frequency and I External Resistor (R ...

Page 15

Thermal Shutdown Temperature sensing is provided IR3842W. The trip threshold is typically set to o 140 C. When trip threshold is exceeded, thermal shutdown turns off both MOSFETs discharges the soft start capacitor. Automatic restart is initiated when the sensed ...

Page 16

TIMING DIAGRAM OF PGOOD FUNCTION Fig.9a IR3842W Non-Tracking Operation (Seq=Vcc) Fig.9b IR3842W Tracking Operation Rev 11.0 IR3842WMPbF 16 ...

Page 17

Minimum on time Considerations The minimum ON time is the shortest amount of time for which the Control FET may be reliably turned on, and this depends on the internal timing delays. For the IR3842W, the typical minimum on-time is ...

Page 18

Application Information Design Example: The following example is a typical application for IR3842W. The application circuit is shown on page 23 13.2V max 1 ≤ ...

Page 19

Vc across C6 remains approximately unchanged and the voltage at the Boot pin becomes ≅ + − .......... .......... .......... Boot Fig. 12. Bootstrap circuit to generate Vc voltage A bootstrap ...

Page 20

Output Capacitor Selection The voltage ripple and transient requirements determine the output capacitors type and values. The criteria is normally based on the value of the Effective Series Resistance (ESR). However the actual capacitance value and the Equivalent Series Inductance ...

Page 21

V Z OUT E REF Gain(dB) H( Fig. 14. Type II compensation network and its asymptotic gain plot The transfer function ( given by: e ...

Page 22

V OUT E REF Gain(dB) H( Fig.15. Type III Compensation network and its asymptotic gain plot The ...

Page 23

Detailed calculation of compensation TypeIII o Θ = Desired Phase Margin 70 − Θ sin 17.63 kHz Θ sin 1 + Θ sin 567.1 kHz P ...

Page 24

... X7R, 10% Panasonic Thick Film, 0603,1/10W,1% Rohm Thick Film, 0603,1/10W,1% Rohm Thick Film, 0603,1/10W,1% Rohm 0603, 50V, X7R, 10% Panasonic 0603, 16V, X5R, 20% Panasonic SupIRBuck, 4A, PQFN 5x6mm International Rectifier IR3842WMPbF Part Number EEV-FK1E331P C3216X5R1E106M ECJ-1VB1E104K MPO104-1R5IR ECJ-2FB0J226ML MCR03EZPFX4992 MCR03EZPFX7501 MCR03EZPFX2372 MCR03EZPFX1821 MCR03EZPFX1002 ECJ-1VB1E104K ...

Page 25

TYPICAL OPERATING WAVEFORMS Vin=12.0V, Vcc=5V, Vo=1.8V, Io=0-4A, Room Temperature, No Air Flow Fig. 17. Start Load :Enable Fig. 19. Start ...

Page 26

TYPICAL OPERATING WAVEFORMS Vin=12V, Vcc=5V, Vo=1.8V, Io=2A-4A, Room Temperature, No Air Flow Fig. 23. Transient Response step Rev 11.0 IR3842WMPbF 2.5A/μ ...

Page 27

TYPICAL OPERATING WAVEFORMS Vin=12V, Vcc=5V, Vo=1.8V, Io=4A, Room Temperature, No Air Flow Fig. 24. Bode Plot at 4A load shows a bandwidth of 98kHz and phase margin of 53 Rev 11.0 IR3842WMPbF degrees 27 ...

Page 28

Simultaneous Tracking at Power Up and Power Down Vin=12V, Vo=1.8V, Io=4A, Room Temperature, No Air Flow 3.3V R 3.92K s1 2.49K R s2 Fig. 25: Simultaneous Tracking a 3.3V input at power-up and shut-down Rev 11.0 V OUT IR3842W IR3624 ...

Page 29

Layout Considerations The layout is very important when designing high frequency switching converters. Layout will affect noise pickup and can cause a good design to perform with less than expected results. Make all the connections for components in the top ...

Page 30

Feedback trace should be kept away form noise sources Fig. 26b. IRDC3842W demoboard layout considerations – Bottom Layer Analog Ground plane Single point connection between AGND & PGND, should be close to the SupIRBuck, kept away from noise sources. Fig. ...

Page 31

PCB Metal and Components Placement Lead lands (the 11 IC pins) width should be equal to nominal part lead width. The minimum lead to lead spacing should be ≥ 0.2mm to minimize shorting. Lead land length should be equal to ...

Page 32

Solder Resist It is recommended that the lead lands are Non Solder Mask Defined (NSMD). The solder resist should be pulled away from the metal lead lands by a minimum of 0.025mm to ensure NSMD pads. The land pad should ...

Page 33

Stencil Design • The Stencil apertures for the lead lands should be approximately 80% of the area of the lead lads. Reducing the amount of solder deposited will minimize the occurrences of lead shorts. If too much solder is deposited ...

Page 34

IR WORLD HEADQUARTERS: This product has been designed and qualified for the Consumer market Rev 11.0 IR3842WMPbF BOTTOM VIEW 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 Visit us at www.irf.com for sales contact information Data and ...

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