LT1956EGN Linear Technology, LT1956EGN Datasheet - Page 16
![IC SW REG STP-DWN HI VOLT 16SSOP](/photos/6/59/65965/161-16-ssop_sml.jpg)
LT1956EGN
Manufacturer Part Number
LT1956EGN
Description
IC SW REG STP-DWN HI VOLT 16SSOP
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet
1.LT1956EGNPBF.pdf
(28 pages)
Specifications of LT1956EGN
Internal Switch(s)
Yes
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
1.2 ~ 45 V
Current - Output
1.5A
Frequency - Switching
500kHz
Voltage - Input
5.5 ~ 60 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-
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LT1956/LT1956-5
APPLICATIO S I FOR ATIO
16
bypassed with a 1000pF capacitor to prevent coupling
problems from the switch node. If hysteresis is desired in
the undervoltage lockout point, a resistor R
added to the output node. Resistor values can be calcu-
lated from:
Example: output voltage is 5V, switching is to stop if input
voltage drops below 12V and should not restart unless
input rises back to 13.5V.
V
IN
25k suggested for R
V
R
R
R
R
= 12V. Let R
IN
V = Hysteresis in input voltage level
HI
FB
HI
FB
= Input voltage at which switching stops as input
voltage descends to trip level
R
25 12 2 38 1 5 5 1 1 5
25 10 41
116 5 1 5
R
LO IN
HI
k
k
2 24
k
.
V
2 38 25 5 5
V
INPUT
LO
.
OUT
.
/ .
2 38
U
.
= 25k.
2 38
.
/
–
.
C2
LO
V
116
387
R
k
U
. /
LO
V V
k
R
R
/
.
k
LO
HI
5 5
OUT
V is therefore 1.5V and
.
A
W
A
IN
SHDN
LT1956
1
.
V
U
FB
Figure 4. Undervoltage Lockout
5.5 A
can be
2.38V
0.4V
GND
R
SYNCHRONIZING
The SYNC input must pass from a logic level low, through
the maximum synchronization threshold with a duty cycle
between 10% and 90%. The input can be driven directly
from a logic level output. The synchronizing range is equal
to initial operating frequency up to 700kHz. This means
that minimum practical sync frequency is equal to the
worst-case high self-oscillating frequency (570kHz), not
the typical operating frequency of 500kHz. Caution should
be used when synchronizing above 662kHz because at
higher sync frequencies the amplitude of the internal slope
compensation used to prevent subharmonic switching is
reduced. This type of subharmonic switching only occurs
at input voltages less than twice output voltage. Higher
inductor values will tend to eliminate this problem. See
Frequency Compensation section for a discussion of an
entirely different cause of subharmonic switching before
assuming that the cause is insufficient slope compensa-
tion. Application Note 19 has more details on the theory
of slope compensation.
At power-up, when V
Figure 2, Q2), the sync function is disabled. This allows the
frequency foldback to operate in the shorted output con-
dition. During normal operation, switching frequency is
controlled by the internal oscillator until the FB pin reaches
0.8V, after which the SYNC pin becomes operational. If no
synchronization is required, this pin should be connected
to ground.
FB
+
–
+
–
STANDBY
TOTAL
SHUTDOWN
C
V
is being clamped by the FB pin (see
SW
L1
+
1956 F04
C1
OUTPUT
1956f