LTC1159CG Linear Technology, LTC1159CG Datasheet - Page 14

IC SW REG STEP-DWN HI-EFF 20SSOP

LTC1159CG

Manufacturer Part Number
LTC1159CG
Description
IC SW REG STEP-DWN HI-EFF 20SSOP
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet

Specifications of LTC1159CG

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
Adjustable
Current - Output
50mA
Frequency - Switching
250kHz
Voltage - Input
4 ~ 40 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-

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APPLICATIO S I FOR ATIO
LTC1159
LTC1159-3.3/LTC1159-5
certain types of inductors in high current (I
applications when they are lightly loaded.
An external offset is put in series with the SENSE
subtract from the built-in 0.025V offset. An example of this
technique is shown in Figure 7. Two 100 resistors are
inserted in series with the leads from the sense resistor.
With the addition of R3, a current is generated through R1
causing an offset of:
14
V
OFFSET
LTC1159
SENSE
SENSE
Figure 7. Suppressing Burst Mode Operation
= V
+
OUT
9
8
C
T
U
R1 + R3
1000pF
1k
1N4148
R1
0.1 F
3300pF
U
R3
L
100
100
R2
R1
1
2
3
4
5
6
7
8
+
1 F
P-GATE
V
V
P-DRIVE
V
C
I
SENSE
TH
IN
CC
CC
T
W
Figure 8. LTC1159 Layout Diagram (N and S Packages)
3
1
R
0.15 F
LTC1159 • F07
SENSE
(SHDN1)
SENSE
N-GATE
EXTV
SHDN2
1000pF
PGND
SGND
2
CAP
V
4
BOLD LINES INDICATE HIGH CURRENT PATHS
CC
FB
OUT
U
+
+
16
15
14
13
12
11
10
9
> 5A)
pin to
C
OUT
SHUTDOWN
100pF
If V
cancelled and Burst Mode operation is prevented from
occurring. Since V
current is also decreased by the same offset. Thus, to get
back to the same I
be reduced:
To prevent noise spikes from erroneously tripping the
current comparator, a 1000pF capacitor is needed across
the SENSE
Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1159. These items are also illustrated graphically in
the layout diagram of Figure 8. Check the following in your
layout:
P-CHANNEL
R
CONNECTION
OFFSET
SENSE
5V EXTV
R1
R2
CC
> 0.025V, the minimum threshold will be
and SENSE
I
MAX
75
+
N-CHANNEL
MAX
C
OUT
OFFSET
D1
m
L
, the value of the sense resistor must
+
LTC1159 • F08
3
4
is constant, the maximum load
pins.
C
IN
1
2
R
SENSE
V
OUTPUT DIVIDER
REQUIRED WITH
ADJUSTABLE
VERSION ONLY
V
OUT
+
+
IN

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