IP2021CTRPBF International Rectifier, IP2021CTRPBF Datasheet

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... High Frequency Low Profile DC-DC Converters Package Interface Description Connection iP2021CPbF LGA iP2021CTRPbF LGA Typical Application (Dual Output) www.irf.com Dual Channel Power Block Integrated Power Semiconductors, Drivers, & Passives = 95ºC Description The iP2021C is a fully optimized solution for high current synchronous buck dual-phase or dual output applications ...

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Absolute Maximum Ratings PGND …..………….……..…... -0.3V to 16V IN1 IN2 V to PGND ...…..……………..……..…… -0.3V to 16V DD PWM1, PWM2 to PGND …….....…..…….. -0.3V to 7.5V (Note 1) EN1, EN2 to PGND ………………….……. -0.3V to 7.5V ...

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PARAMETER CV CC Output Voltage Output Capacitor CV Power On Reset CC CV Rising CC CV Falling CC CV Threshold CC ENABLE INPUT (EN1, EN2) Logic Level Low Threshold Logic Level High Threshold Threshold Hysteresis Weak Pull Down Resistance Rising ...

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Power Loss Curve 12V 1. 1MHz 325nH 125ºC 12 BLK SOA Curve ...

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Typical Performance Curves 1. 1. 60A 1MHz SW 1. 325nH 125ºC 1.04 BLK 1.02 1.00 0.98 0.96 0. 9.5 10 ...

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Power Loss Measurement Setup www.irf.com Figure 7 Power Loss Test Circuit 90% 10% t PDH Figure 8 Timing Diagram 8/13/2009 PD-97414 iP2021CPbF 10% 90% t PDL 6 ...

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... It incorporates the ability to solve thermal problems where heat is drawn out through the printed circuit board and the top of the case. Please refer to International Rectifier Application Note AN1047 for further details on using this SOA curve in your thermal environment. ...

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Calculating Power Loss and SOA for Different Operating Conditions To calculate Power Loss for a given set of operating conditions, the following procedure should be followed: Power Loss Procedure 1. Determine the maximum current and obtain the typical power loss ...

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Calculating SOA Temperature: (Figure 3) SOA temperature adjustment for input voltage  -1.0ºC (Figure 5) SOA temperature adjustment for output inductor  0.95ºC (Figure 6) SOA temperature adjustment for switch frequency  -1.5ºC axis intercept adjustment  -1.0ºC + 0.95ºC ...

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Internal Block Diagram Pin Description Pin Number Pin Name IN1 IN2 SW1 SW2 3, 7 PGND PWM1 PWM2 EN2, 10, 11 EN1 www.irf.com ...

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... The following guidelines are recommended to reduce the parasitic values and optimize overall performance: All pads on the iP2021C footprint design need to be Solder-mask defined (see Figure 11). • Also refer to International Rectifier application notes AN1028 and AN1029 for further footprint design guidance. Place as many vias around the Power pads (V • ...

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Figure 12 Top & Bottom Component and Via Placement (Topside, Transparent view down) www.irf.com iP2021CPbF 8/13/2009 PD-97414 12 ...

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Mechanical Outline Drawing 0.15 [.006 [0.433 VIN 1 PIN 1 IDENTIFICATION 2 VSW PGND TOP VIEW 8.38 6.74 5.09 3.44 0.34 3.05 0.45 5.56 PIN 1 BOTTOM VIEW ...

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Figure 14 Tape and Reel Information 8/13/2009 PD-97414 iP2021CPbF 14 ...

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Recommended Solder Paste Stencil Design The recommended reflow peak temperature is 260°C. The total furnace time is approximately 5 minutes with approximately 10 seconds at peak temperature. www.irf.com Figure 15 Solder Paste Stencil Design 8/13/2009 PD-97414 iP2021CPbF 15 ...

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Part Marking www.irf.com Figure 16 Part Marking 8/13/2009 PD-97414 iP2021CPbF 16 ...