LM27212SQX/NOPB National Semiconductor, LM27212SQX/NOPB Datasheet - Page 4

• Manufacturer Part Number: LM27212SQX/NOPB
• Description: IC CURR-MODE BUCK CTRLR 48-LLP
• Manufacturer: National Semiconductor
• Type: Step-Down (Buck)r

Specifications of LM27212SQX/NOPB

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: 0.7 ~ 1.71 V
• Voltage - Input: 5 ~ 30 V
• Operating Temperature: -5°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LLP
• Power - Output: 1.56W
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Frequency - Switching: -
• Other names: LM27212SQX; LM27212SQXTR

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Pin Descriptions (LLP)
Pin 1, VID4: 5th bit to program the output voltage, as speci-
fied in VID Code table.
Pin 2, VID5: 6th and most significant bit to program the
output voltage, as specified in VID Code table.
Pin 3, STP_CPU#: When this pin is logic low, VREF voltage
is equal to that on the VSTP pin. This pin offers the power
supply. designer a way to dynamically (meaning when the
regulator is running) lower the output voltage by a preset
percentage of the VREF value.
Pin 4, SLP: When this pin is logic high, VREF voltage is
equal to that on the VSLP pin. The pin offers the power
supply designer a way to dynamically (meaning when the
regulator is running) change the output voltage to a preset
fixed value.
Pin 5, VRON: Chip enable input. When this pin goes high,
soft start begins. When this pin goes low, soft shutdown
begins.
Pin 6, VREF: Desired regulator output voltage under no
load.
Pin 7, VSLP: Desired Sleep mode output voltage. Connect
this pin to the desired reference level. See the typical appli-
cation circuit. Also refer to the Pin 4 definition.
Pin 8, VSTP: Desired Stop CPU mode output voltage. Con-
nect this pin to the desired reference level. See the typical
application circuit. Also refer to the Pin 3 definition.
Pin 9, VBOOT: Initial output voltage desired after soft start
completes. Connect this pin to the desired reference level.
This pin offers the power supply designer a way to start into
a different voltage than the final desired value. The output
voltage will start slewing (in a controlled manner) to the value
defined by the VID pins about 25µs after output voltage
reaches VBOOT. See Timing Diagram.
Pin 10, SGND: Signal ground.
Pin 11, VDAC: Buffered Digital-to-Analog converter output.
Pins 12, P_Z1: Reference adjust, do not connect.
Pins 13, NC: No connect.
Pins 14, NC: No connect.
Pins 15, P_Z0: Reference adjust, do not connect.
Pin 16, TGND: Reserved for test purpose. Must be con-
nected to signal ground.
Pin 17, V1R7: 1.7V reference voltage.
Pin 18, SS: Soft start, soft shutdown and slew rate control.
Connect a capacitor between this pin and ground to control
the soft start and soft shutdown speed. The value of the
capacitor will also define the slew rate of the output voltage
swings. There is an internal current source charging or dis-
charging the capacitor at this pin. The current for soft start
and soft shutdown is typically 22µA and 45µA respectively,
and the current for dynamic output voltage swing (whether it
is a Dynamic VID change or it is a change to or from Stop
CPU or Sleep mode) is typically 335µA.
Pin 19, PGOOD: Power good flag. Goes open-drain when
output voltage enters the power good window and XPOK is
asserted. Masked during dynamic output voltage transitions.
See Timing Diagram for further details.
Pin 20, XPOK: Power good control. Only when this pin is a
logic high can PGOOD pin be pulled high. Connect this pin to
the power good flag of another regulator if the latter needs to
be powered up first.
Pin 21, SENSE: Regulator output voltage sense. Connect
directly to output.
4
Pin 22, CLK_EN#: An output signal provided as a conve-
nience to enable an external logic circuit if needed. It is
asserted typically 18µs after both XPOK is high and output
voltage is within power good window.
Pin 23, NC: No connect.
Pin 24, NC: No connect.
Pin 25, VOVP: Over-voltage protection level. Connect this
pin to the desired reference voltage to set the trigger level for
over-voltage protection.
Pins 26, CMPREF: Inductor current reference. Voltage be-
tween this pin and the regulator output determines the in-
ductor current.
Pin 27, CMP2: Current sense for Channel 2. Voltage be-
tween this pin and the regulator output is compared with the
voltage between the inductor current reference (Pin 26) and
the regulator output to control the inductor current.
Pin 28, CMP1: Current sense for Channel 1. Voltage be-
tween this pin and the regulator output is compared with the
voltage betwen inductor current reference (Pin 26) and the
regulator output to control the inductor current.
Pin 29, SYNC2: Connect to the LEN pin of the LM27222
driver to enable or disable the turning on of the bottom power
FET.
Pin 30, OUT2: Channel 2 pulse output to control the switch-
ing of the external MOSFET driver such as the LM27222.
Pin 31, DGND: Digital ground.
Pin 32, VDD: Chip power supply.
Pin 33, OUT1: Channel 1 pulse output to control the switch-
ing of the external MOSFET driver such as the LM27222.
Pin 34, SYNC1: Connect to the LEN pin of the LM27222
driver to enable or disable the turning on of the bottom power
FET.
Pin 35, ILIMREF: Current limit reference. Voltage between
this pin and the regulator output sets the inductor current
limit level.
Pin 36, ILIM2: Current limit sense for Channel 2. Voltage
between this pin and the regulator output is the voltage
across the current sense resistor.
Pins 37, NC: No connect.
Pins 38, NC: No connect.
Pin 39, ILIM1: Current limit sense for Channel 1. Voltage
between this pin and the regulator output is the voltage
across the current sense resistor.
Pin 40, SRCK1: Kelvin connect to Channel 1 bottom FET
source node (ground) to detect negative inductor current.
Pin 41, SW1: Connect to Channel 1 switch node (drain of
bottom power FET) to detect negative inductor current.
Pin 42, DE_EN#: Diode emulator mode trigger signal. When
the IC is in Sleep mode, if this pin goes low, the regulator will
shut down Channel 2 and force Channel 1 to run in diode
emulation mode (bottom FET is turned off when inductor
current goes negative).
Pin 43, VID0: First and least significant bit to program the
output voltage, as specified in VID Code table.
Pin 44, VID1: 2nd bit to program the output voltage, as
specified in VID Code table.
Pin 45, VID2: 3rd bit to program the output voltage, as
specified in VID Code table.
Pin 46, VID3: 4th bit to program the output voltage, as
specified in VID Code table.
Pins 47 & 48, NC: No connect.