KSZ8995M Micrel Inc, KSZ8995M Datasheet - Page 33

• Manufacturer Part Number: KSZ8995M
• Description: IC SWITCH 10/100 5PORT 128PQFP
• Manufacturer: Micrel Inc

Specifications of KSZ8995M

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Number Of Primary Switch Ports: 5
• Internal Memory Buffer Size: 64
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII/SNI
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 1.9/2.6/3.6V
• Operating Supply Voltage (min): 1.7/2.4/3V
• Operating Temperature Classification: Commercial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1607 - BOARD EVAL EXPERIMENT KSZ8995MA
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-1038

Configuration Interface
The KS8995M can function as a managed switch or unmanaged switch. If no EEPROM or micro-controller exists, the
KS8995M will operate from its default setting. Some default settings are configured via strap in options as indicated in the table
below.
December 2003
KS8995M
Pin #
45
46
62
63
64
65
66
67
68
80
81
82
83
1
Pin Name
PMRXER
PMRXD3
PMRXD2
PMRXD1
PMRXD0
SMRXD3
SMRXD2
SMRXD1
SMRXD0
TEST1
MUX1
MUX2
PCRS
PCOL
PU/PD
Ipd/O
Ipd/O
Ipd/O
Ipd/O
Ipd/O
Ipd/O
Ipd/O
Ipd/O
Ipd/O
Ipd/O
Ipd/O
NC
NC
NC
Description
NC for normal operation. Factory test pin.
MUX1 and MUX2 should be left unconnected for normal operation.
They are factory test pins
Mode
Normal Operation
Remote Analog Loopback Mode for Testing only
Reserved
Power Save Mode for Testing only
PHY[5] MII receive bit 3. Strap option: PD (default) = enable flow control;
PU = disable flow control.
PHY[5] MII receive bit 2. Strap option: PD (default) = disable back pressure;
PU = enable back pressure.
PHY[5] MII receive bit 1. Strap option: PD (default) = drop excessive collision
packets; PU = does not drop excessive collision packets.
PHY[5] MII receive bit 0. Strap option: PD (default) = disable aggressive back-off
algorithm in half-duplex mode; PU = enable for performance enhancement.
PHY[5] MII receive error. Strap option: PD (default) = 1522/1518 bytes;
PU = packet size up to 1536 bytes.
PHY[5] MII carrier sense/Force duplex mode. See “Register 76” for port 4 only.
PD (default) = Force half-duplex if auto-negotiation is disabled or fails. PU = Force
full-duplex if auto-negotiation is disabled or fails.
PHY[5] MII collision detect/ Force flow control. See “Register 66” for port 4 only.
PD (default) = No force flow control. PU = Force flow control.
Switch MII receive bit 3. Strap option: PD (default) = Disable Switch MII full-duplex
flow control; PU = Enable Switch MII full-duplex flow control.
Switch MII receive bit 2. Strap option: PD (default) = Switch MII in full-duplex mode;
PU = Switch MII in half-duplex mode.
Switch MII receive bit 1. Strap option: PD (default) = Switch MII in 100Mbps mode;
PU = Switch MII in 10Mbps mode.
Switch MII receive bit 0; Strap option: LED Mode PD (default) = Mode 0;
PU = Mode 1. See “Register 11.”
LEDX_2
LEDX_1
LEDX_0
33
Mode 0
Lnk/Act
Fulld/Col
Speed
Mux1
NC
0
1
1
Mode 1
100Lnk/Act
10Lnk/Act
Fulld
M9999-120403
Mux2
NC
1
0
1
Micrel