KSZ8995M Micrel Inc, KSZ8995M Datasheet - Page 50

IC SWITCH 10/100 5PORT 128PQFP

KSZ8995M

Manufacturer Part Number
KSZ8995M
Description
IC SWITCH 10/100 5PORT 128PQFP
Manufacturer
Micrel Inc
Datasheets

Specifications of KSZ8995M

Applications
*
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
Number Of Primary Switch Ports
5
Internal Memory Buffer Size
64
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII/SNI
Power Supply Type
Analog/Digital
Package Type
PQFP
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
1.9/2.6/3.6V
Operating Supply Voltage (min)
1.7/2.4/3V
Operating Temperature Classification
Commercial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
576-1607 - BOARD EVAL EXPERIMENT KSZ8995MA
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
576-1038

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KS8995M
Advanced Control Registers
The IPv4 TOS priority control registers implement a fully decoded 64 bit DSCP (Differentiated Services Code Point) register
used to determine priority from the 6 bit TOS field in the IP header. The most significant 6 bits of the TOS field are fully decoded
into 64 possibilities, and the singular code that results is compared against the corresponding bit in the DSCP register. If the
register bit is a 1, the priority is high; if it is a 0, the priority is low.
Registers 104 to 109 define the switching engine’s MAC address. This 48-bit address is used as the source address in MAC pause control frames.
Use registers 110 and 111 to read or write data to the static MAC address table, VLAN table, dynamic address table, or the MIB counters.
M9999-120403
Register 31 (0x1F): Port 1 Status 1
Register 47 (0x2F): Port 2 Status 1
Register 63 (0x3F): Port 3 Status 1
Register 79 (0x4F): Port 4 Status 1
Register 95 (0x5F): Port 5 Status 1
Address
7-1
0
Address
Register 96 (0x60): TOS Priority Control Register 0
7-0
Register 97 (0x61): TOS Priority Control Register 1
7-0
Register 98 (0x62): TOS Priority Control Register 2
7-0
Register 99 (0x63): TOS Priority Control Register 3
7-0
Register 100 (0x64): TOS Priority Control Register 4
7-0
Register 101 (0x65): TOS Priority Control Register 5
7-0
Register 102 (0x66): TOS Priority Control Register 6
7-0
Register 103 (0x67): TOS Priority Control Register 7
7-0
Register 104 (0x68): MAC Address Register 0
7-0
Register 105 (0x69): MAC Address Register 1
7-0
Register 106 (0x6A): MAC Address Register 2
7-0
Register 107 (0x6B): MAC Address Register 3
7-0
Register 108 (0x6C): MAC Address Register 4
7-0
Register 109 (0X6D): MAC Address Register 5
7-0
Name
Reserved
Far end fault
Name
DSCP[63:56]
DSCP[55:48]
DSCP[47:40]
DSCP[39:32]
DSCP[31:24]
DSCP[23:16]
DSCP[15:8]
DSCP[7:0]
MACA[47:40]
MACA[39:32]
MACA[31:24]
MACA[23:16]
MACA[15:8]
MACA[7:0]
Description
1, perform PHY loopback, i.e. loopback MAC’s TX
back to RX.
0, normal operation.
1, Far end fault status detected.
0, no far end fault status detected.
Description
50
Mode
R/O
RO
Mode
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
Default
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
0x00
0x10
0xA1
0xff
0xff
0xff
December 2003
Micrel

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