MAX1329BETL+ Maxim Integrated Products, MAX1329BETL+ Datasheet - Page 25

• Manufacturer Part Number: MAX1329BETL+
• Description: IC DAS 12BIT 300KSPS 40-TQFN-EP
• Manufacturer: Maxim Integrated Products

Specifications of MAX1329BETL+

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The MAX1329/MAX1330 smart DASs are based on a
312ksps, 12-bit SAR ADC with a 1ksps, 16-bit DSP
mode. The ADC includes a differential multiplexer, a pro-
grammable gain amplifier (PGA) with gains of 1, 2, 4,
and 8, a 20-bit accumulator, internal dither, a 16-word
FIFO, and an alarm register. The MAX1329/MAX1330
operate with a digital supply down to 1.8V and feature an
internal charge pump to boost the supply voltage for the
analog circuitry that requires 2.7V to 5.5V.
The MAX1329/MAX1330 include an internal reference
with programmable buffer for the ADC, two analog exter-
nal inputs as well as inputs from other internal circuitry,
an internal/external temperature sensor, internal oscilla-
tor, dual single-pole, double-throw (SPDT) switches, four
digital programmable I/Os, four analog programmable
I/Os, and dual programmable voltage monitors.
The MAX1329 features dual 12-bit force-sense DACs
with programmable reference buffer and one opera-
tional amplifier. The MAX1330 includes one 12-bit force-
sense DAC with programmable reference buffer and
dual op amps. DACA can be sequenced with a 16-word
FIFO. The DAC buffers and op amps have internal ana-
log switches between the output and the inverting input.
After a power-on reset, the DV
enabled with thresholds at 1.8V and 2.7V. All digital
and analog programmable I/Os (DPIOs and APIOs) are
configured as inputs with pullups enabled. The internal
oscillator is enabled and is output at CLKIO once the
1.8V reset trip threshold has been exceeded and the
subsequent timeout period has expired. See the
Figure 1. Detailed Serial-Interface Timing Diagram
12-/16-Bit DASs with ADC, DACs, DPIOs, APIOs,
Reference, Voltage Monitors, and Temp Sensor
DOUT
SCLK
DIN
CS
______________________________________________________________________________________
t
CSH
Detailed Description
t
CSS
t
DD
DV
t
CYC
t
DS
voltage supervisor is
Power-On Reset
t
CL
t
CH
t
DH
Register Bit Descriptions section for the default values
after a power-on reset.
After applying power to AV
1) Write to the Reset register. This initializes the tem-
2) Within 3ms following the reset, configure the charge
Power AV
ways: drive AV
power supply, drive AV
external power supplies, or drive DV
supply and enable the internal charge pump to gener-
ate AV
Figure 2. DOUT Enable and Disable Time Load Circuits
DOUT
a) FOR ENABLE, HIGH IMPEDANCE
perature sensor and voltage reference trim logic.
pump as desired by writing to the CP/VM Control
register. The details of programming the charge
pump are described in the Charge Pump section.
TO V
FOR DISABLE, V
DD
OH
AND V
3kΩ
or short DV
DD
OL
OH
TO V
and DV
TO HIGH IMPEDANCE.
DD
OH
C
LOAD
.
and DV
= 20pF
DD
DD
t
DO
to AV
DD
by any one of the following
DD
DOUT
b) FOR ENABLE, HIGH IMPEDANCE
DD
t
C
and DV
CSH
:
TO V
FOR DISABLE, V
LOAD
DD
DV
with a single external
OL
DD
= 20pF
internally.
3kΩ
AND V
Power-On Setup
DD
DD
OH
Charge Pump
OL
TO V
with an external
TO HIGH IMPEDANCE.
with separate
OL
t
TR
.
25