DS1875T+ Maxim Integrated Products, DS1875T+ Datasheet - Page 23

• Manufacturer Part Number: DS1875T+
• Description: IC SFP CTRLR/TRIPLEXER 38-TQFN
• Manufacturer: Maxim Integrated Products

Specifications of DS1875T+

• Applications: Fiber Optics
• Interface: I²C
• Voltage - Supply: 2.85 V ~ 3.9 V
• Package / Case: *
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The DS1875 has an ID hard-coded to its die. Two regis-
ters (Table 02h, Registers 86h–87h) are assigned for
this feature. Byte 86h reads 75h to identify the part as
the DS1875; byte 87h reads the die revision.
The DS1875 contains two power-on reset (POR) levels.
The lower level is a digital POR (V
level is an analog POR (V
supply voltage rises above V
abled (FETG and BIAS outputs are high impedance,
MOD is low), all SRAM locations are low (including
shadowed EEPROM (SEE)), and all analog circuitry is
disabled. When V
recalled, and the analog circuitry is enabled. While V
remains above V
ing state, and it responds based on its nonvolatile con-
figuration. If during operation V
is still above V
from the first SEE recall, but the device analog is shut
down and the outputs are disabled. FETG is driven to
its alarm state defined by the FETG DIR bit (Table 02h,
Register 89h). If the supply voltage recovers back
above V
functioning. When the supply voltage falls below V
the device SRAM is placed in its default state and
another SEE recall is required to reload the nonvolatile
settings. The EEPROM recall occurs the next time V
exceeds V
as the voltage varies.
Figure 9. SEE Timing
V
FETG
V
V
POA
POD
SEE
CC
PRECHARGED
IMPEDANCE
SEE RECALL
HIGH
TO 0
POA
POA
, the device immediately resumes normal
. Figure 9 shows the sequence of events
POD
POA
OPERATION
NORMAL
______________________________________________________________________________________
, the SRAM retains the SEE settings
, the device is in its normal operat-
CC
RECALLED
VALUE
reaches V
Low-Voltage Operation
POA
POA
DRIVEN TO
FETG DIR
). At startup, before the
CC
Die Identification
, the outputs are dis-
falls below V
POD
PON Triplexer and SFP Controller
POA
) and the higher
, the SEE is
PRECHARGED
IMPEDANCE
HIGH
TO 0
POA
SEE RECALL
POD
but
CC
CC
,
OPERATION
NORMAL
Any time V
used to determine if V
is accomplished by checking the RDYB bit in the status
(Lower Memory, Register 6Eh) byte. RDYB is set when
V
RDYB is timed (within 500µs) to go to 0, at which point
the part is fully functional.
For all device addresses sourced from EEPROM (Table
02h, Register 8Ch), the default device address is A2h
until V
to be recalled from the EEPROM.
The DS1875 offers a new feature to improve the accu-
racy and range of MON3, which is most commonly
used for monitoring RSSI. This feature enables right-
shifting (along with its gain and offset settings) when
the input signal is below a set threshold (within the
range that benefits using right-shifting) and then auto-
matically disables right-shifting (recalling different gain
and offset settings) when the input signal exceeds the
threshold. Also, to prevent “chattering,” hysteresis pre-
vents excessive switching between modes in addition
to ensuring that continuity is maintained. Dual range
operation is enabled by default (factory programmed in
EEPROM). However, it can easily be disabled through
the RSSI_FF and RSSI_FC bits. When dual range oper-
ation is disabled, MON3 operates identically to the
other MON channels, although featuring a differential
input.
CC
Enhanced RSSI Monitoring (Dual Range
is below V
CC
exceeds V
DRIVEN TO
FETG DIR
CC
is above V
POA
RECALLED
VALUE
OPERATION
POA
NORMAL
. When V
CC
, allowing the device address
POD
is below the V
, the I
CC
DRIVEN TO
FETG DIR
2
rises above V
C interface can be
Functionality)
POA
level. This
PRECHARGED
IMPEDANCE
HIGH
TO 0
POA
23
,