KS8995XA Micrel Inc, KS8995XA Datasheet - Page 17

• Manufacturer Part Number: KS8995XA
• Description: IC SWITCH 10/100 5PORT 128PQFP
• Manufacturer: Micrel Inc

Specifications of KS8995XA

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Number Of Primary Switch Ports: 5
• Internal Memory Buffer Size: 64
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII/SNI
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1604 - EVAL KIT EXPERIMENTAL KS8995XA
• Lead Free Status / RoHS Status: Not Compliant, Lead free / RoHS Compliant

September 2008
Notes:
1.
2.
Pin Number
128
118
123
125
P = Power supply.
I = Input.
O = Output.
I/O = Bidirectional.
Gnd = Ground.
Ipu = Input w/internal pull-up.
Ipd = Input w/internal pull-down.
Ipd/O = Input w/internal pull-down during reset, output pin otherwise.
Ipu/O = Input w/internal pull-up during reset, output pin otherwise.
PU = Strap pin pull-up.
PD = Strap pull-down.
82
81
80
79
75
73
72
71
70
69
74
13
22
28
35
14
23
29
36
15
31
41
43
1
7
8
3
Pin Name
SMRXDV
SMRXD1
SMRXD2
SMRXD3
SMTXEN
SMTXER
MDIXDIS
SMTXD0
SMTXD1
SMTXD2
SMTXD3
TESTEN
SMTXC
VDDAP
VDDAR
VDDAR
VDDAR
VDDAR
VDDAR
VDDAR
TEST2
TXM1
TXM2
TXM3
TXM4
TXM5
TXP1
TXP2
TXP3
TXP4
TXP5
Type
Ipd/O
Ipd/O
Ipd/O
Ipd/O
I/O
Ipd
Ipd
Ipd
Ipd
Ipd
Ipd
Ipd
Ipd
O
O
O
O
O
O
O
O
O
O
P
P
P
P
P
P
P
(1)
Port
1-5
1
2
3
4
5
1
2
3
4
5
Pin Function
Switch MII receive bit 1. Strap option: PD (default) = Switch MII in
100Mbps mode; PU = Switch MII in 10Mbps mode.
Switch MII receive bit 2. Strap option: PD (default) = Switch MII in full-
duplex mode; PU = Switch MII in half-duplex mode.
Switch MII receive bit 3. Strap option: PD (default) = Disable Switch MII
full-duplex flow control; PU = Enable Switch MII full-duplex flow control.
Switch MII receive data valid.
Switch MII transmit clock. PHY or MAC mode MII.
Switch MII transmit bit 0.
Switch MII transmit bit 1.
Switch MII transmit bit 2.
Switch MII transmit bit 3.
Switch MII transmit enable.
Switch MII transmit error.
Disable auto MDI/MDI-X.
Factory test pin.
Factory test pin.
Physical transmit signal + (differential).
Physical transmit signal + (differential).
Physical transmit signal + (differential).
Physical transmit signal + (differential).
Physical transmit signal + (differential).
Physical transmit signal – (differential).
Physical transmit signal – (differential).
Physical transmit signal – (differential).
Physical transmit signal – (differential).
Physical transmit signal – (differential).
1.8V analog V
1.8V analog V
1.8V analog V
1.8V analog V
1.8V analog V
1.8V analog V
1.8V analog V
17
(2)
DD
DD
DD
DD
DD
DD
DD
.
.
.
.
.
.
for PLL.
M9999-091508