KS8842-16MQL Micrel Inc, KS8842-16MQL Datasheet - Page 92
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KS8842-16MQL
Manufacturer Part Number
KS8842-16MQL
Description
IC SWITCH 10/100 16BIT 128PQFP
Manufacturer
Micrel Inc
Specifications of KS8842-16MQL
Applications
*
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
Number Of Primary Switch Ports
2
Internal Memory Buffer Size
32
Operating Supply Voltage (typ)
3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII
Power Supply Type
Analog/Digital
Package Type
PQFP
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.5V
Operating Supply Voltage (min)
3.1V
Operating Temperature Classification
Commercial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
KS8842-PMQL-EVAL - EVAL KIT EXPERIMENTAL KS8842KS8842-16MQL-EVAL - EVAL KIT EXPERIMENTAL KS8842
Lead Free Status / RoHS Status
Not Compliant, Lead free / RoHS Compliant
Other names
576-1458
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Bank 45 PHY 1 Auto-Negotiation Link Partner Ability Register (0x0A): P1ANLPR
This register contains the auto-negotiation link partner ability for the switch port 1 function.
Bank 46 PHY 2 MII-Register Basic Control Register (0x00): P2MBCR
This register contains Media Independent Interface (MII) control for the switch function as defined in the IEEE 802.3
specification.
Micrel, Inc.
Bit
15
14
13
12-11
10
9
8
7
6
5
4-0
Bit
15
14
13
12
October 2007
Default
0
0
0
0x0
0
0
0
0
0
0
0x01
Default
0
0
0
1
R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
RO
RW
RW
RW
Description
Next page
Not supported.
LP ACK
Not supported.
Remote fault
Not supported.
Reserved
Pause
Link partner pause capability.
Reserved
Adv 100 Full
Link partner 100 full capability.
Adv 100 Half
Link partner 100 half capability.
Adv 10 Full
Link partner 10 full capability.
Adv 10 Half
Link partner 10 half capability.
Reserved
Description
Soft reset
Not supported.
Far-End Loopback
1 = perform loop back, as indicated (see
Figure15):
0 = normal operation.
Force 100
1 = 100 Mbps.
0 = 10 Mbps.
AN Enable
1 = auto-negotiation enabled.
0 = auto-negotiation disabled.
Start: RXP1/RXM1 (port 1)
Loop back: PMD/PMA of port 2’s PHY
End: TXP1/TXM1 (port 1)
92
Bit is same as:
Bank 49 0x04 bit 4
Bank 49 0x04 bit 3
Bank 49 0x04 bit 2
Bank 49 0x04 bit 1
Bank 49 0x04 bit 0
Bit is same as:
Bank 51 0x02 bit 8
Bank 51 0x02 bit 6
Bank 51 0x02 bit 7
KSZ8842-16/32 MQL/MVL/MVLI/MBL
M9999-102207-1.9