ADUM6402ARWZ Analog Devices Inc, ADUM6402ARWZ Datasheet - Page 4

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ADUM6402ARWZ

Manufacturer Part Number
ADUM6402ARWZ
Description
IC ISOLATOR 4CH DCDC CONV 16SOIC
Manufacturer
Analog Devices Inc
Series
IsoPower®, iCoupler®r
Datasheet

Specifications of ADUM6402ARWZ

Propagation Delay
100ns
Inputs - Side 1/side 2
2/2
Number Of Channels
4
Isolation Rating
5000Vrms
Voltage - Supply
4.25V, 5V
Data Rate
1Mbps
Output Type
Logic
Package / Case
16-SOIC (3.9mm Width)
Operating Temperature
-40°C ~ 105°C
No. Of Channels
4
Supply Current
19mA
Supply Voltage Range
3V To 5.5V, 4.5V To 5.5V
Digital Ic Case Style
SOIC
No. Of Pins
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADUM6402ARWZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
ADUM6402ARWZ-RL
Manufacturer:
ANALOG
Quantity:
20 000
ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404
Table 4. Switching Specifications
Parameter
SWITCHING SPECIFICATIONS
1
2
Table 5. Input and Output Characteristics
Parameter
DC SPECIFICATIONS
AC SPECIFICATIONS
1
7
isolation barrier.
Opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the
isolation barrier.
|CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining V
low input. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.
Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the
Data Rate
Propagation Delay
Pulse Width Distortion
Pulse Width
Propagation Delay Skew
Channel Matching
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Logic Low Output Voltages
Undervoltage Lockout
Input Currents per Channel
Output Rise/Fall Time
Common-Mode Transient
Refresh Rate
Change vs. Temperature
Codirectional
Opposing Directional
Positive Going Threshold
Negative Going Threshold
Hysterisis
Immunity
1
1
2
Symbol
t
PWD
PW
t
t
t
PHL
PSK
PSKCD
PSKOD
Symbol
V
V
V
V
V
V
V
I
t
|CM|
f
, t
I
r
R
IH
IL
OH
OL
UV+
UV−
UVH
/t
PLH
F
Min
1000
Min
0.7 V
V
V
−20
25
DD1
DD1
− 0.3 or V
− 0.5 or V
ISO
A Grade
or 0.7 V
Typ
55
Rev. 0 | Page 4 of 24
ISO
ISO
DD1
− 0.3
− 0.5
Max
1
100
40
50
50
50
Typ
5.0
4.8
0.0
0.2
2.7
2.4
0.3
+0.01
2.5
35
1.0
Min
40
O
> 0.8 × V
C Grade
Max
0.3 V
0.1
0.4
+20
Typ
45
5
DD1
ISO
or 0.8 × V
or 0.3 V
Max
25
60
6
15
6
15
ISO
DD1
for a high input or V
Unit
Mbps
ns
ns
ps/°C
ns
ns
ns
ns
Unit
V
V
V
V
V
V
V
V
V
μA
ns
kV/μs
Mbps
Test Conditions
Within PWD limit
50% input to 50% output
|t
Within PWD limit
Between any two units
PLH
Test Conditions
I
I
I
I
V
0 V ≤ V
10% to 90%
V
transient magnitude = 800 V
Ox
Ox
Ox
Ox
DD1
Ix
O
= V
− t
= −20 μA, V
= −4 mA, V
= 20 μA, V
= 4 mA, V
< 0.8 × V
, V
DD1
PHL
DDL
Ix
|
≤ V
or V
, V
DD1
ISO
DDX
Ix
ISO
Ix
or 0.8 × V
Ix
= V
supply
Ix
= V
, V
= V
= V
IxL
CM
IxL
IxH
IxH
= 1000 V,
ISO
for a

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