HCPL-2200-000E Avago Technologies US Inc., HCPL-2200-000E Datasheet - Page 12

• Manufacturer Part Number: HCPL-2200-000E
• Description: OPTOCOUPLER LOGIC 2.5MBD 8-DIP
• Manufacturer: Avago Technologies US Inc.

Specifications of HCPL-2200-000E

• Package / Case: 8-DIP (0.300", 7.62mm)
• Voltage - Isolation: 3750Vrms
• Number Of Channels: 1, Unidirectional
• Current - Output / Channel: 25mA
• Data Rate: 2.5MBd
• Propagation Delay High - Low @ If: 210ns @ 3mA
• Current - Dc Forward (if): 10mA
• Input Type: DC
• Output Type: Tri-State
• Mounting Type: Through Hole
• Isolation Voltage: 3750 Vrms
• Maximum Continuous Output Current: 25 mA
• Maximum Fall Time: 0.007 us
• Maximum Forward Diode Current: 10 mA
• Output Device: Logic Gate Photo IC
• Configuration: 1 Channel
• Maximum Baud Rate: 5 MBd(Typ)
• Maximum Forward Diode Voltage: 1.7 V
• Maximum Reverse Diode Voltage: 5 V
• Maximum Power Dissipation: 210 mW
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• No. Of Channels: 1
• Optocoupler Output Type: Logic Gate
• Input Current: 5mA
• Output Voltage: 20V
• Opto Case Style: DIP
• No. Of Pins: 8
• Common Mode Ratio: 2.5k
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 516-1647-5

INPUT
DATA
OUTPUT
TOTEM
(+5 V)
V
GATE
POLE
CC1
Figure 15. Recommended LED drive circuit.
Figure 11. Test circuit for common mode transient immunity and typical waveforms.
Figure 13. Recommended LSTTL to LSTTL circuit.
12
INPUT
*The 120 pF capacitor may be omitted in applications where 500 ns propagation delay is sufficient.
V
DATA
CC1
TTL OR
LSTTL
(+5 V)
1
1.1
TTL OR
LSTTL
k
V
R
FF
IN
V
OUTPUT
V
120 pF
O
CM
PULSE GENERATOR
1
2
3
4
1.1 k
V
V
0 V
D1
D1 (1N4150) REQUIRED FOR
ACTIVE PULL-UP DRIVER.
OH
OL
B
A
* SEE NOTE 6.
HCPL-2200
SWITCH AT A: I
SWITCH AT B: I
1
2
3
4
1
2
3
4
V
O
GND
V
HCPL-2200
CC
+
(MAX.)*
50 V
HCPL-2200
V
O
8
7
6
5
(MIN.)*
V
–
GND
V
F
F
CM
CC
2
= 1.6 mA
= 0 mA
GND
V
CC
8
7
6
5
8
7
6
5
V
CC
0.1 µF
BYPASS
UP TO 16
LSTTL
LOADS
OR 4 TTL
LOADS
V
(+5 V)
DATA
OUTPUT
CC2
OUTPUT V
MONITORING
NODE
O
COLLECTOR
Figure 16. Series LED drive with open collector gate (4.7 k resistor
dhunts I
INPUT
V
DATA
INPUT
CC
Figure 14. LSTTL to CMOS interface circuit.
DATA
OUTPUT
(+5 V)
TOTEM
V
(+5 V)
GATE
CC1
POLE
OPEN
GATE
OH
from the LED).
1
TTL OR
LSTTL
1.1
k
TTL OR
LSTTL
1.1
k
4.7 k
Figure 12. Thermal derating curve,
dependence of safety limiting value with case
temperature per IEC/EN/DIN EN 60747-5-2.
120 pF (OPTIONAL*)
V
800
700
600
500
400
300
200
100
10 V
15 V
20 V
120 pF (OPTIONAL*)
1
2
3
4
5 V
CC2
0
0
T
HCPL-2200
1
2
3
4
25
HCPL-2219 OPTION 060 ONLY
S
2.37 K
3.83 K
5.11 K
1.1 K
R
– CASE TEMPERATURE – °C
L
50
HCPL-2200
P
I
S
75 100
GND
S
V
(mA)
CC
(mW)
8
7
6
5
GND
V
CC
125
2
150
8
7
6
5
R
(4.5 TO 20 V)
L
CMOS
V
175
CC2
200
DATA
OUTPUT