HCPL-560K-100 Avago Technologies US Inc., HCPL-560K-100 Datasheet - Page 9
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HCPL-560K-100
Manufacturer Part Number
HCPL-560K-100
Description
ISOLAT 1.5KVDC 1CH OPEN 8SMD BJ
Manufacturer
Avago Technologies US Inc.
Datasheet
1.HCPL-5600.pdf
(12 pages)
Specifications of HCPL-560K-100
Package / Case
8-SMD Butt Joint
Voltage - Isolation
1500VDC
Number Of Channels
1, Unidirectional
Current - Output / Channel
25mA
Data Rate
10Mbps
Propagation Delay High - Low @ If
55ns @ 13mA
Current - Dc Forward (if)
20mA
Input Type
DC
Output Type
Open Collector
Mounting Type
Surface Mount
Maximum Continuous Output Current
25 mA
Maximum Fall Time
40 ns
Maximum Forward Diode Current
20 mA
Maximum Rise Time
90 ns
Output Device
Logic Gate Photo IC
Configuration
1 Channel
Maximum Baud Rate
10 MBps
Maximum Forward Diode Voltage
1.9 V
Maximum Reverse Diode Voltage
5 V
Maximum Power Dissipation
200 mW
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Notes:
1. Each channel.
2. All devices are considered two-terminal devices; I
3. Measured between each input pair shorted together and all output connections for that channel shorted together.
4. Measured between adjacent input pairs shorted together for each multichannel device.
5. t
6. The HCPL-6630, HCPL-6631, and HCPL-663K dual channel parts function as two independent single channel units. Use the single channel
7. CM
8. This is a momentary withstand test, not an operating condition.
9. It is essential that a bypass capacitor (0.01 to 0.1 µF, ceramic) be connected from V
10. No external pull up is required for a high logic state on the enable input.
11. The t
12. The t
13. Standard parts receive 100% testing at 25°C (Subgroups 1 and 9). SMD and 883B parts receive 100% testing at 25, 125, and -55°C (Sub-
14. Parameters are tested as part of device initial characterization and after design and process changes. Parameters are guaranteed to limits
15. Not required for 6N134, 6N134/883B, 8102801, HCPL-268K and 5962-9800101 types.
16. Required for 6N134, 6N134/883B, 8102801, HCPL-268K and 5962-9800101 types.
17. Not required for HCPL-5650, HCPL-5651 and 8102805 types.
18. Required for HCPL-5650, HCPL-5651 and 8102805 types only.
Figure 1. High Level Output Current vs. Tempera-
ture.
9
leads or terminals shorted together.
the output pulse. The t
on the trailing edge of the output pulse.
parameter limits for each channel.
(V
high state (V
this external capacitor and the isolator connections should not exceed 20 mm.
the trailing edge of the output pulse.
the leading edge of the output pulse.
groups 1 and 9, 2 and 10, 3 and 11, respectively).
specified for all lots not specifically tested.
PHL
O
< 0.8 V). CM
propagation delay is measured from the 50% point on the leading edge of the input pulse to the 1.5 V point on the leading edge of
L
is the maximum rate of rise of the common mode voltage that can be sustained with the output voltage in the logic low state
ELH
EHL
enable propagation delay is measured from the 1.5 V point on the trailing edge of the enable input pulse to the 1.5 V point on
enable propagation delay is measured from the 1.5 V point on the leading edge of the enable input pulse to the 1.5 V point on
O
> 2.0 V).
H
is the maximum rate of fall of the common mode voltage that can be sustained with the output voltage in the logic
PLH
propagation delay is measured from the 50% point on the trailing edge of the input pulse to the 1.5 V point
Figure 2. Input-Output Characteristics.
I-O
is measured between all input leads or terminals shorted together and all output
CC
to ground. Total lead length between both ends of
Figure 3. Input Diode Forward Characteristics.