CDB5460AU Cirrus Logic Inc, CDB5460AU Datasheet - Page 25

• Manufacturer Part Number: CDB5460AU
• Description: EVALUATION BOARD FOR CS5460A
• Manufacturer: Cirrus Logic Inc

Specifications of CDB5460AU

• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: CS5460A
• Primary Attributes: 1-Phase Current & Voltage Monitoring
• Secondary Attributes: Graphical User Interface, SPI™ & USB Interfaces
• Processor To Be Evaluated: CS5460A, C8051F320
• Interface Type: USB
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant

or custom calibration board. When the metering
system is installed, the calibrator would be used to
control calibration and/or to program user-speci-
fied commands and calibration values into the EE-
PROM. The commands/data will determine the
CS5460A’s exact operation, when the auto-boot
initialization sequence is running. Any of the valid
commands can be used.
3.3.2 Auto-boot Data for EEPROM
This section illustrates what a typical set of code
would look like for an auto-boot sequence. This
code is what would be written into the EEPROM. In
the sequence below, the EEPROM is programmed
so that it will first send out commands that write cal-
ibration values to the calibration registers inside
the CS5460A. This is followed by the commands
used to set (write) the desired Pulse-Rate Register
value, and also to un-mask the ‘LSD’ status bit in
the Mask Register. Finally, the EEPROM code will
initiate ‘continuous computation cycles’ data acqui-
sition mode and select one of the alternate
pulse-output formats (e.g., set the MECH bit in the
Control Register). The serial data for such a se-
quence is shown below in single-byte hexidecimal
notation:
DS487F4
40 00 00 61
44 7F C4 A9
46 7F B2 53
MODE
SCLK
SDO
RES
SDI
CS
;Write to Configuration Regis-
ter, turn high-pass filters on,
set K = 1.
;Write value of 0x7FC4A9 to
Current Channel Gain Regis-
ter.
;Write value of 0x7FB253 to
Voltage Channel DC Offset
EE Read
Figure 14. Timing Diagram for Auto-boot Sequence
Address 0
5460A
This data from the EEPROM will drive the SDI pin
of the CS5460A during the auto-boot sequence.
The following sequence of events will cause the
CS5460A to execute the auto-boot mode initializa-
tion sequence: (A simple timing diagram for this se-
quence is shown below in Figure 14.) If the MODE
pin is set to logic high (or if the MODE pin was
set/tied to logic high during/after the CS5460A has
been powered on), then changing the RESET pin
from active state to inactive state (low to high) will
cause the CS5460A to drive the CS pin low, and af-
ter this, to issue the standard EEPROM block-read
command on the CS5460A’s SDO line. Once these
events have completed, the CS5460A will continue
to issue SCLK pulses, to accept data/commands
from the EEPROM. The serial port will become a
master-mode interface. For a more detailed timing
diagram, see Switching Characteristics (in Section
1.)
4C 00 00 14
74 00 00 04
E8
78 00 01 40
Commands
Register.
;Set Pulse Rate Register to
0.625 Hz.
;Unmask bit #2 (“LSD” bit in
the Mask Register).
;Start performing continuous
computation cycles.
;Write STOP bit to Control
Register, to terminate au-
to-boot
quence, and also set the
EOUT pulse output to Me-
chanical Counter Format.
initialization
Stop
CS5460A
se-
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