STEVAL-ISB005V1 STMicroelectronics, STEVAL-ISB005V1 Datasheet - Page 55

• Manufacturer Part Number: STEVAL-ISB005V1
• Description: BOARD EVAL CHARGER ST7260/L6924D
• Manufacturer: STMicroelectronics
• Type: Battery Managementr

Specifications of STEVAL-ISB005V1

• Main Purpose: Power Management, Battery Charger
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: L6924, ST72F63BK6M1
• Primary Attributes: 1 Cell- Li-Ion / Li-Pol, 5 V (USB Input)
• Secondary Attributes: Powered by Wall Adaptor Also, LED Status Indicators
• Input Voltage: 5 V
• Product: Power Management Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: L6924D, ST7260
• Other names: 497-8428

ST7260xx
Output compare
In this section, the index, i, may be 1 or 2 because there are two output compare functions in
the 16-bit timer.
This function can be used to control an output waveform or indicate when a period of time
has elapsed.
When a match is found between the Output Compare register and the free running counter,
the output compare function:
Two 16-bit registers Output Compare register 1 (OC1R) and Output Compare register 2
(OC2R) contain the value to be compared to the counter register each timer clock cycle.
Table 27.
These registers are readable and witable and are not affected by the timer hardware. A
reset event changes the OC
Timing resolution is one count of the free running counter: (f
Procedure
To use the Output Compare function, select the following in the CR2 register:
●
●
And select the following in the CR1 register:
●
●
When a match is found between OCRi register and CR register:
●
●
●
The OC
the following formula:
Where:
Δt
f
PRESC = Timer prescaler factor (2, 4 or 8 depending on CC[1:0] bits; see
CPU
–
–
–
Set the OCiE bit if an output is needed then the OCMPi pin is dedicated to the output
compare i signal.
Select the timer clock (CC[1:0]) (see
Select the OLVLi bit to applied to the OCMPi pins after the match occurs.
Set the OCIE bit to generate an interrupt if it is needed.
OCFi bit is set
The OCMPi pin takes OLVLi bit value (OCMPi pin latch is forced low during reset)
A timer interrupt is generated if the OCIE bit is set in the CR1 register and the I bit is
cleared in the CC register (CC).
i
R register value required for a specific timing application can be calculated using
= Output compare period (in seconds)
= CPU clock frequency (in hertz)
Assigns pins with a programmable value if the OCiE bit is set
Sets a flag in the status register
Generates an interrupt if enabled
Register
Output compare byte distribution
OCiR
i
R value to 8000h.
Δ OCiR =
Table
MS byte
OCiHR
Δt
PRESC
*
f
32).
CPU
CPU
/CC[1:0]).
Watchdog timer (WDG)
LS byte
OCiLR
Table
32)
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