SI3056SSI2-EVB Silicon Laboratories Inc, SI3056SSI2-EVB Datasheet - Page 72

• Manufacturer Part Number: SI3056SSI2-EVB
• Description: BOARD EVAL SI3056/SI3010 SSI
• Manufacturer: Silicon Laboratories Inc

Specifications of SI3056SSI2-EVB

• Main Purpose: Telecom, Data Acquisition Arrangement (DAA)
• Utilized Ic / Part: Si3056
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Si3018/19/10
Register 31. DAA Control 3
Reset settings = 0010_0000
72
Bit
6:5
Name
Type
7
4
3
2
1
0
Bit
Reserved Read returns zero.
Reserved Read returns zero.
FOH[1:0]
Name
OHS2
FULL
LVFD
FILT
FULL
R/W
D7
Full Scale Transmit and Receive Mode (Si3019 line-side device only).
0 = Default.
1 = Transmit/receive full scale.
This bit changes the full scale of the ADC and DAC from 0 min to +3.2 dBm into a 600 Ω load
(or 1 dBV into all reference impedances). When this bit is set, the DCV[1:0] bits (Register 26)
should be set to all 1s to avoid distortion at low loop currents.
Fast Off-Hook Selection.
These bits determine the length of the off-hook counter. The default setting is 128 ms.
00 = 512 ms.
01 = 128 ms.
10 = 64 ms.
11 = 8 ms.
On-Hook Speed 2.
Filter Pole Selection (Si3019 line-side device only).
0 = The receive path has a low –3 dBFS corner at 5 Hz.
1 = The receive path has a low –3 dBFS corner at 200 Hz.
Line Voltage Force Disable (Si3019 line-side device only).
0 = Normal operation.
1 = The circuitry that forces the LVS register (Register 29) to all 0s at 3 V or less is disabled.
The LVS register may display unpredictable values at voltages between 0 to 2 V. All 0s are
displayed if the line voltage is 0 V.
This bit, in combination with the OHS bit (Register 16) and the SQ[1:0] bits on-hook speeds
specified are measured from the time the OH bit is cleared until loop current equals zero.
OHS
D6
0
0
1
FOH[1:0]
R/W
D5
OHS2
0
1
X
D4
SQ[1:0]
00
00
11
OHS2
R/W
D3
Rev. 1.05
Mean On-Hook Speed
Less than 0.5 ms
3 ms ±10% (meets ETSI standard)
26 ms ±10% (meets Australia spark quenching spec)
D2
Function
FILT
R/W
D1
LVFD
R/W
D0