ISL55110EVAL1Z Intersil, ISL55110EVAL1Z Datasheet - Page 4

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ISL55110EVAL1Z

Manufacturer Part Number
ISL55110EVAL1Z
Description
EVALUATION BOARD FOR ISL55110
Manufacturer
Intersil
Datasheet

Specifications of ISL55110EVAL1Z

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to
verify that the Application Note or Technical Brief is current before proceeding.
IN_B - BNC
IN_A - BNC
50Ω
50Ω
R2
R1
GND
GND
For information regarding Intersil Corporation and its products, see www.intersil.com
VH - BANANA JACK
TP-IN_B
TP-IN_A
4
DIF+
DIF+
DIF-
DIF-
S1- ENABLE CONTROL
SPDT- CENTER OFF
VDD
FIGURE 7. QFN EVALUATION BOARD SCHEMATIC
GND
SPDT - CENTER OFF
GND
C1
+
4.7µF
S2 - POWER DOWN CONTROL
1
2
3
4
VDD
/ENABLE
PD
IN-B
GND
.
10k
R7
VH
0.1µF
C2
GND
ISL55110, ISL55111_QFN
Application Note 1283
FIGURE 8. QFN LAYOUT
GND 11
10k
TP-VH
R8
OA 9
OB 12
VH 10
DIF+
DIF-
VDD
VH
PD - BNC
GND
DIF+
GND
DIF+
TP_VDD
DIF-
DIF-
DIF+
DIF-
TP-OB
TP-OA
GND
C6
NOT
POPULATED POPULATED
C7
NOT
POPULATED POPULATED
C3
0.1µF
EN - BNC
VDD
GND
R3
R4
GND
C4
0.1µF
GND
GND
NOT
C8
C9
NOT
R5
R6
C5
+
4.7µF
VDD - BANANA JACK
GND - BANANA JACK
OA - BNC
OB - BNC
February 13, 2007
AN1283.0

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