ISL54208EVAL1Z Intersil, ISL54208EVAL1Z Datasheet - Page 11

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ISL54208EVAL1Z

Manufacturer Part Number
ISL54208EVAL1Z
Description
EVALUATION BOARD FOR ISL54208
Manufacturer
Intersil
Datasheets

Specifications of ISL54208EVAL1Z

Main Purpose
Interface, Analog & Digital Switch
Embedded
No
Utilized Ic / Part
ISL54208
Primary Attributes
2 x SPDT Audio, USB & Video Switch
Secondary Attributes
1.8 V ~ 5.5 V Supply
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
EXTERNAL SERIES RESISTOR AT IN LOGIC CONTROL
PIN
The ISL54208 contains a clamp circuit between IN and VDD.
Whenever the IN voltage is greater than the V
more than 2.55V, current will flow through this clamp circuitry
into the V
During normal USB operation, V
3.6V and IN (V
the range of 4.4V to 5.25V, the clamp circuit is not active and
no current will flow through the clamp into the V
In a USB application, the situation can exist where the V
voltage from the computer could be applied at the IN pin
before the V
range and current will flow through the clamp into the V
Typical Performance Curves
FIGURE 10. THD+N vs SUPPLY VOLTAGE vs FREQUENCY
0.09
0.08
0.07
0.06
0.05
0.04
0.11
0.1
0.5
0.4
0.3
0.2
0.1
0
20
0
R
V
DD
R
FREQ = 1kHz
V
LOAD
LOAD
FIGURE 12. THD+N vs OUTPUT VOLTAGE
DD
LOAD
V
DD
V
power supply bus.
DD
0.5
= 3V
DD
BUS
= 32Ω
= 0.707V
voltage is up to its normal operating voltage
= 2.7V
= 32Ω
= 2.6V
voltage from computer or USB hub) is in
1
RMS
OUTPUT VOLTAGE (V
200
FREQUENCY (Hz)
V
1.5
DD
11
= 3V
DD
is in the range of 2.7V to
2
P-P
2K
T
2.5
A
)
= +25°C, Unless Otherwise Specified
DD
DD
V
DD
voltage by
3
supply.
= 3.6V
DD
BUS
20K
3.5
ISL54208
power supply bus. This current could be quite high when
V
components connected in the circuit. In the application
circuit, a 22k
to limit the current to a safe level during this situation.
It is recommended that a current limiting resistor in the range
of 10k
have minimal impact on the logic level at the IN pin during
normal USB operation and protect the circuit during the time
V
voltage.
Note: No external resistor is required in applications where
IN pin voltage will not exceed V
DD
BUS
FIGURE 11. THD+N vs SIGNAL LEVELS vs FREQUENCY
0.4
0.3
0.2
0.1
0.5
0.4
0.3
0.2
0.1
0
is OFF or at 0V and could potentially damage other
0
Ω
20
is present before V
0
to 50k
R
V
DD
R
FREQ = 1kHz
V
LOAD
FIGURE 13. THD+N vs OUTPUT POWER
DD
LOAD
Ω
= 3V
= 3V
Ω
resistor has been put in series with the IN pin
= 32Ω
= 32Ω
be connected in series with the IN pin. It will
10
200
OUTPUT POWER (mW)
FREQUENCY (Hz)
DD
20
1V
2V
2.5V
is up to its normal operating
3V
P-P
P-P
DD
P-P
P-P
by more than 2.55V.
30
2K
December 18, 2006
40
FN6410.0
20K
50

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