ISL6252AEVAL2Z Intersil, ISL6252AEVAL2Z Datasheet - Page 13
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ISL6252AEVAL2Z
Manufacturer Part Number
ISL6252AEVAL2Z
Description
EVALUATION BOARD FOR ISL6252A
Manufacturer
Intersil
Datasheet
1.ISL6252HAZ.pdf
(25 pages)
Specifications of ISL6252AEVAL2Z
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Setting the Battery Regulation Voltage
The ISL6252 uses a high-accuracy trimmed band-gap
voltage reference to regulate the battery charging voltage.
The VADJ input adjusts the charger output voltage, and the
VADJ control voltage can vary from 0 to VREF, providing a
10% adjustment range (from 4.2V - 5% to 4.2V + 5%) on
CSON regulation voltage. An overall voltage accuracy of
better than 0.5% is achieved.
The per-cell battery termination voltage is a function of the
battery chemistry (consult the battery manufacturers to
determine this voltage):
• Float VADJ to set the battery voltage
• Connect VADJ to VREF to set 4.41V × number of cells
• Connect VADJ to ground to set 3.99V × number of cells
so, the maximum battery voltage of 17.6V can be achieved.
note that other battery charge voltages can be set by
connecting a resistor divider from VREF to ground. The resistor
divider should be sized to draw no more than 100µA from
VREF; or connect a low impedance voltage source like the D/A
converter in the micro-controller. The programmed battery
voltage per cell can be determined by Equation 1:
An external resistor divider from VREF sets the voltage at
VADJ according to Equation 2:
To minimize accuracy loss due to interaction with VADJ's
internal resistor divider, ensure the AC resistance looking
back into the external resistor divider is less than 25k.
Connect CELLS as shown in Table 1 to charge 2, 3 or 4 Li+
cells. When charging other cell chemistries, use CELLS to
select an output voltage range for the charger. The internal
error amplifier gm1 maintains voltage regulation. The voltage
error amplifier is compensated at VCOMP. The component
values shown in Figure 3 provide suitable performance for most
applications. Individual compensation of the voltage regulation
and current-regulation loops allows for optimal compensation.
V
V
CELL
VADJ
V
CSON
=
=
0.175 V
VREF
TABLE 1. CELL NUMBER PROGRAMMING
= 4.2V × number of the cells
CELLS
VDD
GND
Float
⋅
×
VADJ
---------------------------------------------------------------------------------------------------------------- -
R
top_VADJ
+
3.99V
R
||
13
bot_VADJ
514kΩ
+
R
||
bot_VADJ
CELL NUMBER
514kΩ
4
3
2
||
514kΩ
ISL6252, ISL6252A
(EQ. 2)
(EQ. 1)
I
Setting the Battery Charge Current Limit
The CHLIM input sets the maximum charging current. The
current set by the current sense-resistor connects between
CSOP and CSON. The full-scale differential voltage between
CSOP and CSON is 165mV for CHLIM = 3.3V, so the
maximum charging current is 4.125A for a 40mΩ sensing
resistor. Other battery charge current-sense threshold
values can be set by connecting a resistor divider from
VREF or 3.3V to ground, or by connecting a low impedance
voltage source like a D/A converter in the micro-controller.
Unlike VADJ and ACLIM, CHLIM does not have an internal
resistor divider network. The charge current limit threshold is
given by Equation 3:
I
To set the trickle charge current for the dumb charger, an
A/D output controlled by the micro-controller is connected to
CHLIM pin. The trickle charge current is determined by
Equation 4:
When the CHLIM voltage is below 88mV (typical), it will
disable the battery charge. When choosing the current
sensing resistor, note that the voltage drop across the
sensing resistor causes further power dissipation, reducing
efficiency. However, adjusting CHLIM voltage to reduce the
voltage across the current sense resistor R
accuracy due to the smaller signal to the input of the current
sense amplifier. There is a trade-off between accuracy and
power dissipation. A low pass filter is recommended to
eliminate switching noise. Connect the resistor to the CSOP
pin instead of the CSON pin, as the CSOP pin has lower
bias current and less influence on current-sense accuracy
and voltage regulation accuracy.
Charge Current Limit Accuracy
The “Electrical Specifications” table on page 6 gives
minimum and maximum values for the CSOP-CSON voltage
resulting from IC variations at 3 different CHLIM voltages
(CSOP-CSON Full-Scale Current Sense Voltage on page 7).
It also gives formulae for calculating the minimum and
maximum CSOP-CSON voltage at any CHLIM voltage.
Equation 5 shows the formula for the max full scale
CSOP-CSON voltage (in mV) for the ISL6252A:
CHG
CHG
(
(
CSOP CSON
CSOP CSON
=
=
⎛
⎝
⎛
⎝
–
–
165mV
-------------------
165mV
-------------------
R
R
1
1
⎞
⎠
⎞
⎠
)
)
⎛
⎝
MAX
⎛
⎝
ISL6252A
MIN
V
--------------------------------------- -
V
--------------------- -
CHLIM trickle
CHLIM
3.3V
=
=
3.3V
CHLIM 49.72 2.4
CHLIM 50.28
⎞
⎠
,
⎞
⎠
•
•
–
+
2.4
1
will degrade
August 25, 2010
(EQ. 5)
FN6498.3
(EQ. 3)
(EQ. 4)