SERDESUR-43USB/NOPB National Semiconductor, SERDESUR-43USB/NOPB Datasheet - Page 15

• Manufacturer Part Number: SERDESUR-43USB/NOPB
• Description: BOARD EVAL DS90UR124,DS90UR241
• Manufacturer: National Semiconductor

Specifications of SERDESUR-43USB/NOPB

• Main Purpose: Interface, Serializer, Deserializer (SERDES)
• Utilized Ic / Part: DS90UR241, DS90UR124
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Other names: SERDESUR-43USB

LVCMOS PARALLEL INTERFACE PINS
35-38,
41-44
19-22,
27-30
7-10,
13-16
24
CONTROL AND CONFIGURATION PINS
55
60
48
Pin #
DS90UR124 Pin Diagram
DS90UR124 Deserializer Pin Descriptions
R
R
R
RCLK
RRFB
REN
RPWDNB
OUT
OUT
OUT
Pin Name
[7:0]
[15:8]
[23:16]
LVCMOS_O
LVCMOS_O
LVCMOS_O
LVCMOS_O
LVCMOS_I
LVCMOS_I
LVCMOS_I
I/O/PWR
Receiver Parallel Interface Data Outputs – Group 1
Receiver Parallel Interface Data Outputs – Group 2
Receiver Parallel Interface Data Outputs – Group 3
Parallel Interface Clock Output Pin. Strobe edge set by RRFB configuration pin.
Receiver Clock Edge Select Pin
RRFB = H; R
RRFB = L; R
Receiver Data Enable
REN = H; R
REN = L; R
are in TRI-STATE, PLL still operational and locked to TCLK.
Receiver Power Down Bar
RPWDNB = H; Receiver is Enabled and ON
RPWDNB = L; Receiver is in power down mode (Sleep), R
TRI-STATE stand-by mode, PLL is shutdown to minimize power consumption.
OUT
OUT
OUT
OUT
Deserializer - DS90UR124
[23-0] and RCLK are Disabled (OFF), Receiver R
[23-0] and RCLK are Enabled (ON).
LVCMOS Outputs strobed on the Falling Clock Edge.
LVCMOS Outputs strobed on the Rising Clock Edge.
TOP VIEW
15
Description
OUT
[23-0], RCLK, and LOCK are in
20194520
OUT
[23-0] and RCLK Outputs
www.national.com