CLINK3V48BT-133 National Semiconductor, CLINK3V48BT-133 Datasheet - Page 11

• Manufacturer Part Number: CLINK3V48BT-133
• Description: BOARD EVAL FOR DS90CR485, 486
• Manufacturer: National Semiconductor

Specifications of CLINK3V48BT-133

• Main Purpose: Interface, SerDes (Serializer / De-Serializer)
• Embedded: No
• Utilized Ic / Part: DS90CR485, DS90CR486
• Primary Attributes: Serializes 48 LVCMOS/LVTTL to 8 LVDS, 66 ~ 133 MHz
• Secondary Attributes: Transmits over 2 Meter 3M MDR LVDS Cable
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Overview
The CLINK3V48BT-133 evaluation kit is configured using switches SW1 – SW3
and jumpers J6 – J12.
The DS90CR485 Transmitter and DS90CR485 Receiver parallel
LVCMOS/LVTTL data buses and clocks are accessed through the 50-pin IDC
connectors, J1 – J3. The transmitter clock can be applied through the 50-pin IDC
connector or one of the two on-board oscillators can be selected. The high
speed, serialized LVDS data plus the LVDS clock is transmitted and received
through 3M D26-1 MDR connectors, J4 and J5.
The evaluation board has two power planes, 2.5V for the Transmitter and 3.3V
for the Receiver. Power and ground are supplied through connectors J13 – J16.
The Transmitter inputs can be made 3V input tolerant using jumper J12.
Power Connection
The CLINK348BT-133 evaluation board has two power plane layers: one for the
transmitter’s 2.5V supply and the other layer for the receiver’s 3.3V supply. The
power and ground connections for the evaluation board must be applied through
power spade connectors J13 (2.5V_Vcc), J15 (3.3V_Vcc), J14 and J16 (GND).
See datasheets for recommended operating conditions.
Tantalum 10uF capacitors (C38 and C39) placed near each power connection
provide bulk energy storage. In addition to excellent bypassing provided by the
closely sandwiched power and ground planes, a network of 0.1uF (C1 – C19),
0.01uF (C26 – C31), and 10uF (C32 – C37) bypass capacitors is placed between
each Vcc and ground group to provide additional bypassing near each device.
When using any high speed SerDes, it is recommended that power supply noise
measured at device power and ground pins (especially PLL Vcc and PLL GND)
be less than 100 mV peak-to-peak.
DS90CR485/486 Evaluation Kit User Manual
Rev. 1.01
2.5V Vcc
J13
GND
J14
11 of 32
3.3V Vcc
J15
GND
J16