MAX4810EVKIT+ Maxim Integrated Products, MAX4810EVKIT+ Datasheet - Page 3

• Manufacturer Part Number: MAX4810EVKIT+
• Description: KIT EVAL FOR MAX4810
• Manufacturer: Maxim Integrated Products

Specifications of MAX4810EVKIT+

• Main Purpose: Interface, 2:1 Multiplexer
• Utilized Ic / Part: MAX4810
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

The MAX4810 IC generates high-voltage/high-frequen-
cy unipolar or bipolar pulses from low-voltage logic
inputs. These dual pulsers feature independent logic
inputs, independent high-voltage pulser outputs with
active clamps, and independent high-voltage supply
inputs.
The MAX4810 has three logic inputs per channel to
control the positive and negative pulses and active
clamp. Also included are two independent enable
inputs. Disabling EN ensures that the output MOSFETs
are not accidentally turned on during fast power-supply
ramping. This allows for faster ramp times and smaller
delays between pulsing modes. A low-power shutdown
mode reduces power consumption. All digital inputs
are CMOS compatible.
The MAX4810 EV kit has a total of nine logic input sig-
nals. SHDN controls power-up and down of the device.
There are two sets of INP_, INN_, INC_, and EN_ sig-
nals with one for each channel. INP_ controls the on
and off states of the high-side FET, INN_ controls the
on and off states of the low-side FET, INC_ controls the
active clamp, and EN_ controls the gate-to-source
short. These signals give complete control of the output
stage of each driver. See Table 1 for the EV kit jumper
descriptions.
Figure 2. MAX4810 OUT1 Waveform
OUT1
_______________________________________________________________________________________
Detailed Description of
f = 5MHz
PRF = 1kHz
Hardware
MAX4810 Evaluation Kit
The MAX4810 high-side positive power supply is con-
nected to the VPP1 pad or the VPP2 pad. The negative
power supply is connected to the VNN1 pad or the
VNN2 pad. Close JU12 to share VPP1 and VPP2. Close
JU13 to share VNN1 and VNN2.
The MAX4810 gate drive positive power supply is con-
nected to the VCC pad and the negative power supply
is connected to the VEE pad. Set the shunt on JU11
across pins 2-3 to provide the negative power supply
through the on-board charge-pump voltage inverter, U2
(Maxim ICL7662). When the VCC input voltage is in the
4.5V to 10V range, place a shunt across JU16 pins 1-2.
When VCC is above 10V, leave JU16 open.
The MAX4810 logic power supply is connected to the
VDD pad.
The same power-supply connections can be made
when evaluating the MAX4811 or MAX4812.
Refer to the MAX4810/MAX4811/MAX4812 IC data
sheet for the logic input requirements. INP1 is connect-
ed to header J1, INN1 is connected to header J2, INP2
is connected to header J3, and INN2 is connected to
header J4.
INP_ and INN_ Logic Inputs
Power Supplies
+100V
0V
-100V
3