EASY 6996M CPU Infineon Technologies, EASY 6996M CPU Datasheet - Page 37
![BOARD EVAL W/CPU ADM6996M](/photos/9/10/91037/easy_6996m_cpu_sml.jpg)
EASY 6996M CPU
Manufacturer Part Number
EASY 6996M CPU
Description
BOARD EVAL W/CPU ADM6996M
Manufacturer
Infineon Technologies
Series
Samurair
Datasheet
1.EASY_6996M_CPU.pdf
(216 pages)
Specifications of EASY 6996M CPU
Main Purpose
Interface, Ethernet
Embedded
No
Utilized Ic / Part
ADM6996M
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Primary Attributes
-
Other names
EASY6996MCPUIN
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Table 12
Packet Type
BPDU/SLOW/PAE/RESER_R0/
RESER_R1/GXRP/RESER_R2/
RESER_R3
ARP/RARP
IGMP_IP/MLD_IP/MLD_IPV6
Others
3.1.13.3
Cross-VLAN packets are defined to cross VLAN boundary or bypass the VLAN violation.
Table 13
Packet Type
BPDU/SLOW/PAE/RESER_R0/
RESER_R1/GXRP/RESER_R2/
RESER_R3
ARP/RARP
Data Sheet
Management Packet
Cross_VLAN Packet
Cross_VLAN Packet
Description
The management packet is determined in priority order by:
1. Management bit defined in the Special TAG, when Management_Valid is
2. Management bit defined in the learning table when there is a match for
3. Management bit defined in the control table when there is a match for DA.
4. Management bit in register 003E
The management packet is determined in priority order by:
1. Management bit defined in the Special TAG, when Management_Valid is
2. Management bit in register 000D
The management packet is determined in priority order by:
1. Management bit defined in the Special TAG, when Management_Valid is
2. Management bit in register 000C
The management packet is determined in priority order by:
1. Management bit defined in the Special TAG, when Management_Valid is
2. Management bit defined in the learning table when there is a match for
Description
The cross-VLAN packet is determined in priority order by:
1. Cross_VALN bit defined in the Special TAG, when Cross_VLAN_Valid is
2. Cross_VLAN bit defined in the learning table when there is a match for
3. Cross_VLAN bit defined in the control table when there is a match for DA.
4. Cross_VLAN bit in register 003E
The cross_VLAN packet is determined in priority order by:
1. Cross_VLAN bit defined in the Special TAG, when Cross_VLAN_Valid is
2. Cross-VLAN bit in register 000D
set.
DA+FID.
set.
set.
set.
DA+FID.If the first and second conditions are not satisfied, the frame is
classified as non-management packets.
set.
DA+FID.
set.
37
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H
H
H
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Revision 1.4, 2006-03-24
Function Description
Samurai-6M/MX
ADM6996M/MX
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