EASY 6996M CPU Infineon Technologies, EASY 6996M CPU Datasheet - Page 48
EASY 6996M CPU
Manufacturer Part Number
EASY 6996M CPU
Description
BOARD EVAL W/CPU ADM6996M
Manufacturer
Infineon Technologies
Series
Samurair
Datasheet
1.EASY_6996M_CPU.pdf
(216 pages)
Specifications of EASY 6996M CPU
Main Purpose
Interface, Ethernet
Embedded
No
Utilized Ic / Part
ADM6996M
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Primary Attributes
-
Other names
EASY6996MCPUIN
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Field
Occupy
Info_Ctrl/Age Timer
Portmap
FID
Address
3.1.16.3.2
12 registers are provided by Samurai-6M/6MX (ADM6996M/MX) to support access to the address table. These
12 registers are Address Table Control Register 0 ~ 5 and Address Table Status Register 0 ~ 5 in 011A
Data Sheet
The Registers Accessing the Learning Table
Description
The entry is marked to show the status if the entry is occupied.
0
1
Info_Ctrl is used when the entry is static.
Bit
8
7
6
5
4:3
2
1:0
Age Timer is used when the entry is not static.
Bit
8:0
The field is used as the output ports associated with the FID+MAC Address.
The field is used as the FID group associated with the MAC address.
The MAC Address in the learning table.
B
B
Don’t occupy
Occupy
Description
Source Intrusion
0
1
Span
0
1
Management
0
1
Cross_VLAN
0 = Not a cross_VLAN packet. 1 = A cross_VLAN packet.
TXTAG
It is used as an option for inserting Tag on the transmission port.
00
01
10
11
LRN_PRIEN
0
1
LRN_PRI
It identifies the address priority.
00
01
10
11
Description
Age Timer
This timer is used to control the ageing time.
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
It isn’t a violated source address
It is a violated source address
Not a span packet
A span packet
Not a management packet
A management packet
System Default Tag
Unmodified
Always Tagged
Always Untagged
LRN_PRI is not used
LRN_PRI is used
Queue 0
Queue 1
Queue 2
Queue 3
48
Revision 1.4, 2006-03-24
Function Description
Samurai-6M/MX
ADM6996M/MX
H
~ 0125
H
.
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