MAX16046EVKIT+ Maxim Integrated Products, MAX16046EVKIT+ Datasheet - Page 13

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MAX16046EVKIT+

Manufacturer Part Number
MAX16046EVKIT+
Description
IC EE-PROG SYS MGR 12CH 56-TQFN
Manufacturer
Maxim Integrated Products
Datasheets

Specifications of MAX16046EVKIT+

Main Purpose
Power Management, Power Supply Supervisor/Tracker/Sequencer
Utilized Ic / Part
MAX16046, MAX16048
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
8, 9, 15, 25,
System Managers with Nonvolatile Fault Registers
MAX16046
1–7, 10
33, 48,
29–32,
11–14
49, 64
24, 45
26, 27
34–37
38–41
16
17
18
19
20
21
22
23
28
TQFP
12-Channel/8-Channel EEPROM-Programmable
PIN
8, 9, 11–15,
MAX16048
38–41, 48,
49, 60–64
1–7, 10
25, 33,
29–32,
24, 45
26, 27
34–37
16
17
18
19
20
21
22
23
28
______________________________________________________________________________________
MON9–MON12
GPIO6, GPIO5
MON1–MON8
DACOUT1–
DACOUT9–
DACOUT12
DACOUT8
RESET
NAME
GND
TDO
N.C.
SDA
TMS
TCK
SCL
TDI
EN
A0
ADC Monitored Voltage Inputs. Set ADC input range for each IN_ through
configuration registers. Measured values are written to ADC registers and can be
read back through the I
ADC Monitored Voltage Inputs. Set ADC input range through configuration registers.
Measured values are written to ADC registers and can be read back through the I
or JTAG interface.
No Connection. Must leave unconnected.
Configurable Reset Output
Four-State SMBus Address. Address sampled upon POR. Connect A0 to ground,
DBP, SCL, or SDA to program an individual address when connecting multiple
devices. See the I
SMBus Serial Clock Input
SMBus Serial Data Open-Drain Input/Output
JTAG Test Mode Select
JTAG Test Data In
JTAG Test Clock
JTAG Test Data Out
Ground
General-Purpose Input/Output. GPIO6 and GPIO5 are configurable as open-drain or
push-pull outputs, dedicated fault outputs, or for watchdog functionality. GPIO5 is
configurable as a watchdog input (WDI). GPIO6 is configurable as a watchdog
output (WDO). These inputs/outputs are also configurable for margining. Use the
EEPROM to GPIO5 and GPIO6. See the General-Purpose Inputs/Outputs section.
Analog Enable Input. Apply a voltage greater than the 0.525V (typ) threshold to
enable all outputs. Power-down sequence triggered when EN falls below 0.5V (typ)
and all outputs are deasserted.
DAC Outputs. DACOUT1–DACOUT8 are the outputs of an internal 8-bit DAC. Set
DACOUT_ ranges through configuration registers. Connect a DACOUT_ to an
external DC-DC converter for margining. Leave DACOUT_ outputs unconnected, if
unused.
DAC Outputs. DACOUT9–DACOUT12 are the outputs of an internal 8-bit DAC. Set
DACOUT_ ranges range through configuration registers. Connect a DACOUT_ to an
external DC-DC converter for margining. Leave DACOUT_ outputs unconnected, if
unused.
2
C/SMBus-Compatible Serial Interface section.
2
C or JTAG interface.
Pin Descriptions (continued)
FUNCTION
2
C
13

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