EVAL-AD7951CBZ Analog Devices Inc, EVAL-AD7951CBZ Datasheet - Page 28

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EVAL-AD7951CBZ

Manufacturer Part Number
EVAL-AD7951CBZ
Description
BOARD EVALUATION FOR AD7951
Manufacturer
Analog Devices Inc
Series
PulSAR®r
Datasheets

Specifications of EVAL-AD7951CBZ

Number Of Adc's
1
Number Of Bits
14
Sampling Rate (per Second)
1M
Data Interface
Serial, Parallel
Inputs Per Adc
1 Differential
Input Range
±10 V
Power (typ) @ Conditions
235mW @ 1MSPS
Voltage Supply Source
Analog and Digital, Dual ±
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD7951
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD7951
External Clock Data Read After/During Conversion
It is also possible to begin to read data after conversion and
continue to read the last bits after a new conversion has been
initiated. This method allows the full throughput and the use of a
slower SDCLK frequency. Again, it is recommended to use a
SDCLK
*A DISCONTINUOUS SDCLK IS RECOMMENDED.
SDCLK
SDOUT
*A DISCONTINUOUS SDCLK IS RECOMMENDED.
SDOUT
CNVST
BUSY
BUSY
SDIN
CS
CS
Figure 43. Slave Serial Data Timing for Reading (Read Previous Conversion During Convert)
t
t
31
31
t
t
16
16
X*
X*
Figure 42. Slave Serial Data Timing for Reading (Read After Convert)
t
t
32
32
1
1
t
t
31
31
SER/PAR = 1
t
D13
SER/PAR = 1
D13
X13
33
2
2
D12
D12
X12
3
EXT/INT = 1
3
EXT/INT = 1
t
35
t
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34
t
D11
X11
37
13
t
4
36
t
35
t
37
D1
INVSCLK = 0
INVSCLK = 0
t
14
12
36
discontinuous SDCLK whenever possible to minimize potential
incorrect bit decisions. For the different modes, the use of a slower
SDCLK such as 20 MHz in warp mode, 15 MHz in normal mode
and 13 MHz in impulse mode can be used.
D0
D2
X2
X*
13
RD = 0
RD = 0
DATA = SDIN
D1
X1
X*
14
D0
X0
t
27
X*
15
X13
Y13
X*
16
X12
Y12
X*
17

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