EVAL-AD7612CB Analog Devices Inc, EVAL-AD7612CB Datasheet - Page 30

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EVAL-AD7612CB

Manufacturer Part Number
EVAL-AD7612CB
Description
BOARD EVALUATION AD7612
Manufacturer
Analog Devices Inc
Series
PulSAR®r
Datasheets

Specifications of EVAL-AD7612CB

Number Of Adc's
1
Number Of Bits
16
Sampling Rate (per Second)
750k
Data Interface
Serial, Parallel
Inputs Per Adc
1 Single Ended
Input Range
±5 V, ±10 V
Power (typ) @ Conditions
205mW @ 750kSPS
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD7612
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD7612
MICROPROCESSOR INTERFACING
The AD7612 is ideally suited for traditional dc measurement
applications supporting a microprocessor, and ac signal processing
applications interfacing to a digital signal processor. The AD7612
is designed to interface with a parallel 8-bit or 16-bit wide
interface, or with a general-purpose serial port or I/O ports on a
microcontroller. A variety of external buffers can be used with
the AD7612 to prevent digital noise from coupling into the ADC.
SPI Interface
The AD7612 is compatible with SPI and QSPI digital hosts and
DSPs such as Blackfin® ADSP-BF53x and ADSP-218x/ADSP-219x.
Figure 46 shows an interface diagram between the AD7612 and
the SPI-equipped ADSP-219x. To accommodate the slower speed
of the DSP, the AD7612 acts as a slave device, and data must be
read after conversion. This mode also allows the daisy-chain
feature. The convert command could be initiated in response to
an internal timer interrupt.
The reading process can be initiated in response to the end-of-
conversion signal (BUSY going low) using an interrupt line of
SCCLK
CNVST
SCCS
BUSY
SCIN
WARP = 0 OR 1
IMPULSE = 0 OR 1
X
t
t
33
31
t
31
START
1
BIP = 0 OR 1
TEN = 0 OR 1
t
34
BIPOLAR
2
HW/SW = 0
SER/PAR = 1
3
TEN
Figure 45. Serial Configuration Port Timing
4
t
PD
35
t
INVSCLK = 0
PD = 0
37
IMPULSE
t
5
36
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6
WARP
the DSP. The serial peripheral interface (SPI) on the ADSP-219x
is configured for master mode (MSTR) = 1, clock polarity bit
(CPOL) = 0, clock phase bit (CPHA) = 1, and SPI interrupt enable
(TIMOD) = 0 by writing to the SPI control register (SPICLTx).
It should be noted that to meet all timing requirements, the SPI
clock should be limited to 17 Mbps allowing it to read an ADC
result in less than 1 μs. When a higher sampling rate is desired,
use one of the parallel interface modes.
OB/2C
7
8
DVDD
1
ADDITIONAL PINS OMITTED FOR CLARITY.
Figure 46. Interfacing the AD7612 to SPI Interface
9
SER/PAR
EXT/INT
RD
INVSCLK
AD7612
SDOUT
CNVST
BUSY
SCLK
t
8
1
CS
X
PFx
SPIxSEL (PFx)
MISOx
SCKx
PFx OR TFSx
ADSP-219x
1

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