AD9262-EBZ Analog Devices Inc, AD9262-EBZ Datasheet - Page 21
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AD9262-EBZ
Manufacturer Part Number
AD9262-EBZ
Description
BOARD EVALUATION FOR AD9262
Manufacturer
Analog Devices Inc
Specifications of AD9262-EBZ
Design Resources
Interfacing ADL5382 to AD9262 as an RF-to-Bits Solution (CN0062)
Number Of Adc's
2
Number Of Bits
16
Sampling Rate (per Second)
160M
Data Interface
Serial, SPI™
Inputs Per Adc
1 Differential
Input Range
2 Vpp
Power (typ) @ Conditions
487mW @ 40MSPS
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD9262
Silicon Manufacturer
Analog Devices
Application Sub Type
ADC
Kit Application Type
Data Converter
Silicon Core Number
AD9262
Kit Contents
Software, Evaluation Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
DIGITAL ENGINE
Bandwidth Selection
The digital engine (see Figure 54) selects the decimation signal
bandwidth by cascading third-order sinc (sinc
filters. For a 10 MHz signal band, no filters are cascaded; for a
5 MHz signal band, a single filter is used; and for a 2.5 MHz
signal band, the 5 MHz filter is cascaded with a second filter.
Depending on the signal bandwidth, this drops the data rate
into the fixed decimation filter. As a result, lower signal bandwidth
options result in lower power. Bandwidth selection is determined
by setting Serial Register 0x0F[6:5]. Table 13 summarizes the
available bandwidth options.
Table 13. Output Bandwidth Options
BW[1:0]
0x0
0x1
0x2
0x3
Decimation Filters
The fixed decimation filters reduce the sample rate from 640 MSPS
to 40 MSPS. A fixed frequency low-pass filter is used to define
the signal band. This filter incorporates magnitude equalization
for the droop of the preceding sinc decimation filters and the
sinc filters of the sample rate converter. Table 14 and Table 15
detail the coefficients for the DEC4 and LPF/EQZ filters. Sinc filter
implementation for all sinc filters is standard.
AD9262BCPZ
2.5 MHz
2.5 MHz
2.5 MHz
2.5 MHz
OUTPUT
Σ-Δ
4
2.5MHz
10MHz
5MHz
AD9262BCPZ-5
5 MHz
5 MHz
2.5 MHz
2.5 MHz
BANDWIDTH SELECTION
SINC
SINC
DEC01
DEC02
3
3
2
2
10MHz
5MHz
2.5MHz
3
) decimate-by-2
AD9262BCPZ-10
10 MHz
5 MHz
2.5 MHz
2.5 MHz
SINC
DEC1
HB 2
INT1
4
Figure 54. Digital Engine
2
Rev. A | Page 21 of 32
SINC
DEC2
HB 2
INT2
4
SAMPLE RATE CONVERTER
2
DECIMATION FILTERS
Table 14. DEC4 Filter Coefficients
Coefficient
Number
C0, C22
C1, C21
C2, C20
C3, C19
C4, C18
C5, C17
Table 15. LPF/EQZ Filter Coefficients
Coefficient
Number
C0, C62
C1, C61
C2, C60
C3, C59
C4, C58
C5, C57
C6, C56
C7, C55
C8, C54
C9, C53
C10, C52
C11, C51
C12, C50
C13, C49
C14, C48
C15, C47
SINC
SINC
DEC3
INT3
6
5
2
4
DEC4
HB 2
2
Coefficient
17
31
−15
−52
36
78
−84
−98
170
97
−291
−42
441
−98
−592
353
Coefficient
−21
0
122
0
−418
0
10MHz
5MHz
2.5MHz
LPF/EQZ
FIR
SINC
Coefficient
Number
C7, C15
C8, C14
C9, C13
C11
C6, C16
C10, C12
Coefficient
Number
C16, C46
C17, C45
C18, C44
C19, C43
C20, C42
C21, C41
C22, C40
C23, C39
C24, C38
C25, C37
C26, C36
C27, C35
C28, C34
C29, C33
C30, C32
C31
INT4
NCO
5
8
OUTPUT
16
DATA
Coefficient
694
−744
−677
1271
450
−1909
103
2612
−1147
−3326
3022
4051
−6870
−5305
21,141
38,956
AD9262
Coefficient
1121
0
−2796
0
10,184
16,384