CDB5361 Cirrus Logic Inc, CDB5361 Datasheet - Page 3

• Manufacturer Part Number: CDB5361
• Description: BOARD EVAL FOR CS5361 STEREO ADC
• Manufacturer: Cirrus Logic Inc

Specifications of CDB5361

• Number Of Adc's: 2
• Number Of Bits: 24
• Sampling Rate (per Second): 192k
• Data Interface: Serial
• Inputs Per Adc: 1 Differential
• Power (typ) @ Conditions: 198mW @ 5 V
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -10°C ~ 70°C
• Utilized Ic / Part: CS5361
• Product: Audio Modules
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 598-1547

CDB5361
1. CDB5361 SYSTEM OVERVIEW
The CDB5361 evaluation board is an excellent means of quickly evaluating the CS5361. The CS8406 dig-
ital audio interface transmitter provides an easy interface to digital audio signal analyzers including the
majority of digital audio test equipment.
The CDB5361 schematic has been partitioned into 7 schematics shown in
Figure 2
through
Figure
8. Each
partitioned schematic is represented in the system diagram shown in
Figure
1. Notice that the system dia-
gram also includes the interconnections between the partitioned schematics.
2. CS8406 DIGITAL AUDIO TRANSMITTER
The system generates and encodes standard S/PDIF data using a CS8406 Digital Audio Transmitter
(See
Figure
6). The outputs of the CS8406 are RS422 compatible differential line drivers. The CS8406
2
supports both Left Justified and I
S data formats, as determined by the DIP switch, S2. A description of
the CS8406 is included in the CS8406 datasheet.
3. INPUT/OUTPUT FOR CLOCKS AND DATA
The evaluation board has been designed to allow interfacing to external systems via the 10-pin header, J13.
The schematic for the clock/data input/output is shown in
Figure
5.
The CDB5361 allows some flexibility as to the generation of the clocks. When the CS5361 and CS8406
are in slave mode, the SCLK and LRCK must be provided via the header, J13. MCLK must be generated
from the on board oscillator, Y1. This oscillator is socketed to allow other frequency oscillators to be used.
4. POWER SUPPLY CIRCUITRY
Power is supplied to the evaluation board by six binding posts (-12V, +12V, VD, VL, GND, +5 V),
see
Figure
8. -12V and +12V supply the input amplifiers while the VD input supplies the VD pin of the
CS5361. VL supplies power to the VL pin of the CS5361 and to the level shifter circuits. The +5 V input
supplies power to the +5 V digital circuitry and the VA pin of the CS5361.
5. GROUNDING AND POWER SUPPLY DECOUPLING
The CS5361 requires careful attention to power supply and grounding arrangements to optimize perfor-
mance.
Figure 3
details the power distribution used on this board. The decoupling capacitors are located
as close to the CS5361 as possible. Extensive use of ground plane fill in the evaluation board yields large
reductions in radiated noise.
6. ANALOG INPUT FILTER
The CDB5361 implements a fully differential analog input buffer, as shown in
Figure
2. Note that there is
no attenuation associated with the input buffer, so a 2Vrms differential input applied at the XLR connec-
tors will provide a full-scale 2Vrms differential input to the CS5361.
DS467DB4
3