HI5762EVAL2 Intersil, HI5762EVAL2 Datasheet
HI5762EVAL2
Specifications of HI5762EVAL2
Related parts for HI5762EVAL2
HI5762EVAL2 Summary of contents
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... TM Application Note Description The HI5762EVAL2 evaluation board is made available to allow the circuit designer the ability to evaluate the performance of the Intersil HI5762 monolithic Dual 10-bit 60 MSPS analog-to-digital converter (ADC) with internal voltage reference. As shown in the Evaluation Board Functional Block Diagram, this evaluation board includes sample clock generation circuitry, a single-ended to differential analog input amplifi ...
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... AGND. Table 1 lists the operational supply voltages, typical current consumption and the evaluation board circuit function being powered. Single supply operation of the converter is possible but the overall performance of the converter may degrade. TABLE 1. HI5762EVAL2 EVALUATION BOARD POWER SUPPLIES POWER NOMINAL CURRENT ...
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... I S FIGURE 1. HIGH-SPEED A/D PERFORMANCE TEST SYSTEM t PD1 t OD DATA N-1 DATA N t PD2 DATA N-1 HP8662A HP8662A REF BANDPASS FILTER CLK V IN COMPARATOR I_IN/Q_IN HI5762 CLK I/Q DIGITAL DATA OUTPUT HI5762EVAL2 10 EVALUATION BOARD DATA ACQUISITION SYSTEM GPIB PC DATA N+1 DATA N ...
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... HI5762EVAL2 Typical Performance INPUT FREQUENCY FIGURE 3. EFFECTIVE NUMBER OF BITS (ENOB) vs INPUT FREQUENCY INPUT FREQUENCY FIGURE 5. SINAD vs INPUT FREQUENCY INPUT FREQUENCY FIGURE 7. SNR vs INPUT FREQUENCY 3-4 Application Note 9811 (Input Amplitude at -0.5dBFS 100 1000 1 FIGURE 4. TOTAL HARMONIC DISTORTION (THD) vs INPUT 100 1000 1 FIGURE 6 ...
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... Appendix A HI5762EVAL2 Board Layout FIGURE 9. HI5762EVAL2 EVALUATION BOARD PARTS LAYOUT (NEAR SIDE) FIGURE 10. HI5762EVAL2 EVALUATION BOARD COMPONENT NEAR SIDE (LAYER 1) 3-5 Application Note 9811 ...
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... Appendix A HI5762EVAL2 Board Layout FIGURE 11. HI5762EVAL2 EVALUATION BOARD GROUND PLANE LAYER (LAYER 2) FIGURE 12. HI5762EVAL2 EVALUATION BOARD POWER PLANE LAYER (LAYER 3) 3-6 Application Note 9811 (Continued) ...
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... Appendix A HI5762EVAL2 Board Layout FIGURE 13. HI5762EVAL2 EVALUATION BOARD COMPONENT FAR SIDE (LAYER 4) FIGURE 14. HI5762EVAL2 EVALUATION BOARD PARTS LAYOUT (FAR SIDE) 3-7 Application Note 9811 (Continued) ...
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D + FB7 C18 C17 C14 10 F 0.1 F 0.1 F +5V D2 C79 0.1 F +5V A1 C73 C6 0 IN- IN ...
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... Appendix B HI5762EVAL2 Evaluation Board Schematic Diagrams C12 J1 0.1 F I_IN R1 56.2 R3 499 R4 249 C81 J2 0.1 F Q_IN R24 56.2 R27 499 R28 249 3-9 Application Note 9811 C15 HFA1109IB 4 -5V A C13 0 499 R5 499 + C18 7 C19 0 HFA1109IB 4 -5V A C21 C22 0 FIGURE 16. I CHANNEL ANALOG FRONT END ...
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... Appendix B HI5762EVAL2 Evaluation Board Schematic Diagrams + C37 C38 10 F 0.1 F R10 4.99K ICL8069CCBA C34 0.1 F FIGURE 18. EXTERNAL REFERENCE VOLTAGE GENERATION CIRCUIT C39 C40 J3 0.1 F 0.1 F CLK IN R18 56.2 +5V D VR2 1.0K C44 0.1 F 3-10 Application Note 9811 1. C30 0.1 F R11 R12 ...
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... Appendix B HI5762EVAL2 Evaluation Board Schematic Diagrams E1 E2 FB1 +5V AIN + AGND C46 C47 FB2 +5V A1IN + AGND C48 C49 0 FB3 -5V AIN C50 AGND C51 + 10 F 0.1 F TP1 TP2 AGND TEST POINTS 3-11 Application Note 9811 +5V +5V A (ANALOG INPUT AND REFERENCE DGND VOLTAGE GENERATOR OP AMPS, ...
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... Appendix B HI5762EVAL2 Evaluation Board Schematic Diagrams ID0 - ID9, QD0 - QD9, CLK3 (CLK) 3-12 Application Note 9811 P3C ID1 C5 ID2 C6 ID4 C7 ID6 C8 ID8 C9 C10 C11 C12 C13 QD0 C14 C15 QD3 C16 QD5 C17 QD7 C18 QD9 C19 CLK3 (CLK) C20 C21 ...
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... Appendix C HI5762EVAL2 Evaluation Board Parts List REFERENCE DESIGNATOR - R2 11, 25, 26, 27 R1, 18, 24 R22, 23, 29, 30 R6, 7, 21, 31, 32 R13, 14, 15, 16 R8, 19, 33 R10, 17 R4, 12, 28 VR1 11, 19, 22, 37, 42, 46, 48, 50,52, 54, 56, 60, 63, 78 10, 12, 13, 15, 17, 18, 20, 21, 23, 26, 30, 34, 38, 39, 40, 41, 43, 44, 47, 49, 51, 53, 55, 57, 58, 64, ...
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Appendix D HI5762 A/D Theory of Operation The HI5762 is a dual 10-bit fully differential sampling pipeline A/D converter with digital error correction logic. Figure 22 depicts the circuit for the front end differential-in-differential- out sample-and-hold (S/H) amplifiers. The switches ...
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Appendix D HI5762 A/D Theory of Operation REFOUT REFERENCE V REFIN 3-15 Application Note 9811 (Continued) BIAS STAGE 1 2-BIT 2-BIT FLASH DAC STAGE 8 2-BIT ...
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Appendix D HI5762 A/D Theory of Operation ANALOG INPUT CLOCK INPUT INPUT S/H 1ST STAGE 2ND ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...