ADC08D1020DEV/NOPB National Semiconductor, ADC08D1020DEV/NOPB Datasheet - Page 13

• Manufacturer Part Number: ADC08D1020DEV/NOPB
• Description: BOARD DEV FOR ADC08D1020
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of ADC08D1020DEV/NOPB

• Number Of Adc's: 2
• Number Of Bits: 8
• Sampling Rate (per Second): 1G
• Data Interface: Serial
• Inputs Per Adc: 1 Differential
• Input Range: 870 mVpp
• Power (typ) @ Conditions: 1.6W @ 1GSPS
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: ADC08D1020
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADC08D1020DEV

AC ELECTRICAL CHARACTERISTICS
f
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
f
t
CLK (max)
CLK (min)
CL
CH
SR
HR
PWR
LHT
HLT
OSK
SU
H
AD
AJ
OD
WU
SCLK
SSU
Symbol
Maximum Input Clock
Frequency
Minimum Input Clock
Frequency
Input Clock Duty Cycle
Input Clock Low Time
Input Clock High Time
DCLK Duty Cycle
Setup Time DCLK_RST±
Hold Time DCLK_RST±
Pulse Width DCLK_RST±
Differential Low-to-High
Transition Time
Differential High-to-Low
Transition Time
DCLK-to-Data Output Skew
Data-to-DCLK Set-Up Time
DCLK-to-Data Hold Time
Sampling (Aperture) Delay
Aperture Jitter
Input Clock-to Data Output
Delay (in addition to Pipeline
Delay)
Pipeline Delay (Latency) in 1:2
Demux Mode
(Note
Pipeline Delay (Latency) in
Non-Demux Mode
(Note
Over Range Recovery Time
PD low to Rated Accuracy
Conversion (Wake-Up Time)
Serial Clock Frequency
Serial Data to Serial Clock
Rising Setup Time
11,
11,
Parameter
Note
Note
14)
14)
Normal Mode (non DES) or DES Mode in
1:2 Demux Output
Normal Mode (non DES) or DES Mode in
Non-demux Output
Normal Mode (non DES)
DES Mode
200 MHz
(Normal Mode)
500 MHz
(DES Mode)
(Note
(Note
(Note
(Note
(Note
(Note
10% to 90%, C
10% to 90%, C
50% of DCLK transition to 50% of Data
transition, SDR Mode
and DDR Mode, 0° DCLK
DDR Mode, 90° DCLK
DDR Mode, 90° DCLK
Input CLK+ Fall to Acquisition of Data
50% of Input Clock transition to 50% of
Data transition
DI Outputs
DId Outputs
DQ Outputs
DQd Outputs
DI Outputs
DQ Outputs
Differential V
accurate conversion
Normal Mode
DES Mode
(Note
(Note
11)
11)
11)
12) Differential DCLK_RST
12) Differential DCLK_RST
11)
11)
11)
≤
≤
(Note
f
f
CLK
CLK
IN
(Note
(Note
step from ±1.2V to 0V to get
L
L
Conditions
≤
≤
(Note
= 2.5 pF
= 2.5 pF
11)
1 GHz
1 GHz
12)
13
11)
12)
(Note
(Note
(Note
Normal Mode
DES Mode
Normal Mode
DES Mode
Normal Mode
DES Mode
11)
11)
11)
(Note
Typical
200
500
500
500
150
150
±50
750
890
500
1.3
1.6
0.4
4.0
2.5
50
50
50
90
30
15
1
1
8)
(Note
Limits
13.5
14.5
13.5
200
200
1.0
1.0
20
80
20
80
45
55
13
14
13
14
13
13
4
8)
CLK± Cycles
www.national.com
Input Clock
Input Clock
Input Clock
GHz (max)
GHz (min)
ps (max)
% (max)
% (max)
% (max)
ps (rms)
(Limits)
ps (min)
ps (min)
ns (min)
% (min)
% (min)
% (min)
Cycles
Cycles
Units
Cycle
(min)
MHz
MHz
MHz
ps
ps
ps
ps
ps
ps
ns
ns
ns
µs