ADC08D1020DEV/NOPB National Semiconductor, ADC08D1020DEV/NOPB Datasheet - Page 6

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ADC08D1020DEV/NOPB

Manufacturer Part Number
ADC08D1020DEV/NOPB
Description
BOARD DEV FOR ADC08D1020
Manufacturer
National Semiconductor
Series
PowerWise®r

Specifications of ADC08D1020DEV/NOPB

Number Of Adc's
2
Number Of Bits
8
Sampling Rate (per Second)
1G
Data Interface
Serial
Inputs Per Adc
1 Differential
Input Range
870 mVpp
Power (typ) @ Conditions
1.6W @ 1GSPS
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
ADC08D1020
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ADC08D1020DEV
www.national.com
Pin Functions
Pin No.
126
31
32
34
35
41
52
7
DRST_SEL
Tdiode_P
Tdiode_N
Symbol
CalRun
V
R
ECE
V
CMO
EXT
BG
Equivalent Circuit
6
Common Mode Voltage. This pin is the common mode
output in d.c. coupling mode and also serves as the a.c.
coupling mode select pin. When d.c. coupling is used, the
voltage output at this pin is required to be the common mode
input voltage at V
This pin should be grounded when a.c. coupling is used at
the analog inputs. This pin is capable of sourcing or sinking
100 μA. See
Bandgap output voltage capable of 100 μA source/sink and
can drive a load up to 80 pF.
Calibration Running indication. This pin is at a logic high
when calibration is running.
External bias resistor connection. Nominal value is 3.3 kΩ
(±0.1%) to ground. See
Temperature Diode Positive (Anode) and Negative
(Cathode). These pins may be used for die temperature
measurements, however no specified accuracy is implied or
guaranteed. Noise coupling from adjacent output data
signals has been shown to affect temperature
measurements using this feature. See
Management.
Extended Control Enable. This pin always enables and
disables Extended Control Enable. When this pin is set logic
high, the extended control mode is inactive and all control of
the device must be through control pins only . When it is set
logic low, the extended control mode is active. This pin
overrides the Extended Control Enable signal set using pin
14.
DCLK_RST select. This pin selects whether the DCLK is
reset using a single-ended or differential signal. When this
pin is floating or logic high, the DCLK_RST operation is
single-ended and pin 14 functions as FSR/ALT_ECE. When
this pin is logic low, the DCLK_RST operation becomes
differential with functionality on pin 15 (DCLK_RST+) and pin
14 (DCLK_RST-). When in differential DCLK_RST mode,
there is no pin-controlled FSR and the full-scale-range is
defaulted to the higher V
logic low, the extended control mode is active and the Full-
Scale Voltage Adjust registers can be programmed.
2.2 THE ANALOG
IN
+ and V
Description
1.1.1
IN
IN
input level. When pin 41 is set
− when d.c. coupling is used.
Calibration.
INPUT.
2.6.2 Thermal

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