STEVAL-CBL006V1 STMicroelectronics, STEVAL-CBL006V1 Datasheet

DEMO BOARD BASED ON LNBH24

STEVAL-CBL006V1

Manufacturer Part Number
STEVAL-CBL006V1
Description
DEMO BOARD BASED ON LNBH24
Manufacturer
STMicroelectronics
Type
DC/DC Switching Converters, Regulators & Controllersr
Datasheets

Specifications of STEVAL-CBL006V1

Main Purpose
Special Purpose DC/DC, LNB
Outputs And Type
2, Non-Isolated
Voltage - Input
8 ~ 15V
Regulator Topology
Boost
Board Type
Fully Populated
Utilized Ic / Part
LNBH24
Input Voltage
12 V
Interface Type
I2C
Product
Power Management Modules
Supply Current
500 mA
Silicon Manufacturer
ST Micro
Silicon Core Number
LNBH24
Kit Application Type
Power Management
Application Sub Type
LNB Power Supply
Kit Contents
Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output
-
Voltage - Output
-
Power - Output
-
Frequency - Switching
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
LNBH24
Other names
497-8718
Features
Description
Intended for analog and digital dual satellite
receivers/sat-TV, sat-PC cards, the LNBH24 is a
monolithic voltage regulator and interface IC,
assembled in PowerSSO-36 ePad, specifically
Table 1.
April 2009
Complete interface between LNBS and I²C bus
Built-in DC-DC converter for single 12 V supply
operation and high efficiency (typ. 93%@0.5 A)
Selectable output current limit through external
resistor
Compliant with main satellite receivers output
voltage specification
New accurate built-in 22 kHz tone generator
meets widely accepted standards (patent
pending)
Fast oscillator start-up facilitates DiSEqC™
encoding
Built-in 22 kHz tone detector supports bi-
directional DiSEqC™ 2.0
Very low-drop post regulator and high
efficiency step-up PWM with integrated power
N-MOS allow low power losses
Two output pins suitable for bypassing the
output R-L filter and avoiding tone distortion (R-
L filter as per DiSEqC™ 2.0 specs, see typ.
application circuits)
Overload and over-temperature internal
protections with I²C diagnostic bits
Output voltage and output current level
diagnostic feedback by I²C bits
LNB short circuit dynamic protection
+/- 4 kV ESD tolerant on output power pins
Dual LNB supply and control IC with step-up and I²C interface
LNBH24PPR
Order code
Device summary
PowerSSO-36 (Exposed pad)
Package
Rev 3
designed to provide the 13/18 V power supply and
the 22 kHz tone signalling for two independent
LNB down-converters in the antenna dishes
and/or multi-switch box. In this application field, it
offers a dual tuner STBs with extremely low
component count, low power dissipation together
with simple design and I²C standard interfacing.
PowerSSO-36 (ePad)
Tape and reel
Packaging
LNBH24
www.st.com
1/30
30

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STEVAL-CBL006V1 Summary of contents

Page 1

Dual LNB supply and control IC with step-up and I²C interface Features ■ Complete interface between LNBS and I²C bus ■ Built-in DC-DC converter for single 12 V supply operation and high efficiency (typ. 93%@0.5 A) ■ Selectable output current ...

Page 2

Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 3

System register (SR, 1 Byte for each section A and 7.3 Transmitted data (I²C bus write mode) for each section A ...

Page 4

Block diagram Figure 1. Block diagram TTX- A TTX ISEL - A ISEL - Rsense Rsense EN- EN VSEL- VSEL- P-GND- ...

Page 5

Introduction The LNBH24 includes two completely independent sections. Except for the V inputs, each circuit can be separately controlled and have independent external components. The specification that follow should be considered equally for both sections (A/B). 2.1 Application information ...

Page 6

DSQIN pin or the TEN I²C bit. The DSQIN internal circuit activates the 22 kHz tone on the V presence on the DSQIN pin, and it stops with 1 cycle ± 25 µs delay after ...

Page 7

The LNBH24 is also compliant with the USA LNB power supply standards. In order to allow fast transition of the output voltage from and vice-versa, the LNBH24 is provided with the VCTRL TTL pin which ...

Page 8

OUT function is used to force the V soon as the minimum current test phase is expired, so that the V controlled again as per the VSEL/LLC bits status. In order to avoid false ...

Page 9

Pin configuration Figure 3. Pin connections DSQOUT-B DSQOUT-B DSQOUT-A DSQOUT-A Table 2. Pin description Pin n° Symbol (sec. A/ CC– 11 LX Step-Up voltage ...

Page 10

Table 2. Pin description (continued) Pin n° Symbol (sec. A/B) 18 TTX-A 2 TTX-B 17 DETIN-A Tone decoders 3 DETIN-B 15 DSQOUT- A DiSEqC outputs 5 DSQOUT EXTM-A 36 EXTM-B 10 P-GND-A Power grounds 9 P-GND-B ePad ePad ...

Page 11

Maximum ratings Table 3. Absolute maximum ratings Symbol power supply input voltage pins CC input voltage UP I Output current output pin voltage oRX V Tone output pin voltage ...

Page 12

Application circuit Figure 4. Typical application circuit C4a C4a C3a C3a C5b C5b C6b C6b L2a L2a 470nF 470nF 100µF 100µF 100µF 100µF 470nF 470nF Ferrite Ferrite Bead Bead D1a D1a STPS130A STPS130A L1a L1a 22µH 22µH Rsel-A Rsel-A ...

Page 13

Table 5. Bill of material (valid for A and B sections except for C1, C2, C7, C8 and R1) Component R1, R4 1/4 W resistors. Refer to the typical application circuit for the relative values R3, R 1/8 W resistors. ...

Page 14

I²C bus interface Data transmission from main MCU to the LNBH24 and vice-versa takes place through the 2 wires I²C bus Interface, consisting of the 2 SDA and SCL lines (pull-up resistors to positive supply voltage must be externally ...

Page 15

Figure 5. Data validity on the I²C bus Figure 6. Timing diagram of I²C bus Figure 7. Acknowledge on the I²C bus 15/30 ...

Page 16

LNBH24 software description The LNBH24 I²C interface controls both the IC sections A and B depending on the address sent before the DATA byte. The description below is valid for both sections. 7.1 Interface protocol The interface protocol comprises: ...

Page 17

Table 6. Truth table PCL TTX TEN LLC VSEL ...

Page 18

Table 7. Register IMON VMON TMON LLC These bits are read exactly the same as they were left after last write operation 0/1 0/1 0/1 Note: Values are typical unless otherwise specified. 7.5 Power-on I²C interface reset The I²C interface ...

Page 19

Electrical characteristics Refer to the typical application circuit in VSEL=LLC=TEN=PCL=ITEST=TTX=AUX= mA, unless otherwise stated. Typical values are referred to T voltage. See software description section for I²C access to the system register. Table 8. Electrical characteristics of ...

Page 20

Table 8. Electrical characteristics of sections A/B (continued) Symbol Parameter DC-DC converter switching F SW frequency Tone detector frequency F DETIN capture range V Tone detector input amplitude Sine wave signal, 22 kHz DETIN Tone detector input Z DETIN impedance ...

Page 21

T from ° Table 10. Address pins characteristics Symbol Parameter "0001000(R/W)" Address pin V ADDR-A1 voltage range for section A "0001001(RW)" Address pin V ADDR-A2 voltage range for section A "0001010(R/W)" Address pin V ADDR-B1 ...

Page 22

Refer to the typical application circuit in VSEL=LLC=TEN=PCL=ITEST=TTX=AUX=0, R mA, unless otherwise stated. Typical values are referred to T description section for I²C access to the system register. Table 13. 22KHz tone diagnostic (TMON bit) characteristics of sections A/B Symbol ...

Page 23

Typical performance characteristics Refer to the typical application circuit in VSEL=LLC=TEN=PCL=ITEST=TTX=AUX= mA, unless otherwise stated. Typical values are referred to T Figure 8. Output voltage vs. temperature = ...

Page 24

Figure 14. Supply current vs. temperature =No Load =No Load CC CC OUT OUT Both Sections Enabled with ...

Page 25

Figure 20. Tone frequency vs. temperature OUT OUT EN=TEN=TTX=1 EN=TEN=TTX=1 ...

Page 26

Figure 26. DC-DC converter efficiency vs. temperature 100 100 750 mA = 750 OUT OUT 50 50 EN=VSEL=LLC=1 ...

Page 27

Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at ...

Page 28

PowerSSO-36 mechanical data Dim. Min. A 2. 0.18 c 0.23 D 10. 4.1 Y 4.9 ...

Page 29

Revision history Table 14. Document revision history Date Revision 11-Feb-2008 1 27-Aug-2008 2 07-Apr-2009 3 Changes Initial release. Modified mechanical data on page Modified Y dimension mechanical data 28. on page 28. 29/30 ...

Page 30

... Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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