IRDCIP1001-A International Rectifier, IRDCIP1001-A Datasheet
IRDCIP1001-A
Specifications of IRDCIP1001-A
Related parts for IRDCIP1001-A
IRDCIP1001-A Summary of contents
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Full Function Synchronous Buck Power Block Features • 3.3V to 12V input voltage1 • 20A maximum load capability, with no derating • 5 bit DAC settable, 0.925V to 2V output voltage range 2 • Configurable down to ...
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All specifications @ 25°C (unless otherwise specified) Absolute Maximum Ratings Parameter Symbol V to PGND PGND D0-D4 PGOOD to PGND ENABLE to PGND ILIM FREQ Output RMS Current Block Temperature Recommended ...
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Electrical Specifications (continued) Parameter Symbol V Operating Current DD V Quiescent Current DD V Quiescent Current IN ILIM to SGND Internal Resistance Notes : 1 For Vin less than 4.5V requires external 5V 2 Can be modified to operate up ...
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V = 12V 4 1.3V OUT 3.5 T =125°C BLK f set to 300kHZ 3.0 sw 2.5 2.0 1.5 1.0 0.5 0 Output Current (A) Fig 1. ...
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V = 12V 1. 20A OUT 1.24 f set to 300kHz 125°C BLK 1.18 1.12 1.06 1.00 0.94 0.88 0.9 1.3 1.7 2.1 2.5 2.9 Output Voltage (V) Fig 3. Normalized Power Loss ...
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Shutdown : Upon receipt ...
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Pin Ball D esignator A 9-A 12, B9-B12 14, D 9-D 14, E 9-E 16, IN F9-F16, G9 6-A7, A 13-A 15, B1, B6-B7, B13-B16 6-C ...
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Average VDD Current A Average VDD DC V Voltage PGOOD iP1001 FREQ ENABLE ILIM Average OUT Input P Current LOSS A Average Input DC V Voltage VO VOS ...
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SGND FREQ GNDS PGOOD ENABLE Fig 8. Recommended PCB Footprint (Top View) www.irf.com NC ...
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User’s Design Guidelines The iP1001 is a 20A power block that consists of optimized power semiconductors, PWM control and its associated passive components based on a synchronous buck topology and offers an optimized solution where space, ...
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DESIGN PROCEDURE Inductor Selection The inductor is selected according to the following expression (1-D) / (fsw OUT L where OUT the output voltage in Volts, OUT ...
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Application Issues Setting V above 2V OUT In certain applications where the output voltage is required to be set higher than the maximum DAC code setting of 2V possible to use an external resistive voltage divider which, ...
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Layout Guidelines For stable and noise free operation of the whole power system it is recommended that the designer uses to the following guidelines. 1. Follow the layout scheme presented in Fig.9. Make sure that the output inductor L1 is ...
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Reference Design The schematics in Fig.10a & 10b and complete Bill of Materials in Table 4 are provided as a reference design to enable a preliminary evaluation of iP1001. They represent a simple method of applying the iP1001 ...
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OUT 2 7 LBI LBO GND 4 5 REF SHDN C19 MAX1675 0.1µF JP3 R8 100K TP1 TP3 PGOOD SW1 + ...
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... IRDCiP1001-A (For operation <4.5V Designator Value C1, C3, C5 100uF C2, C4, C6, C7, C8, C9, C10, C15 - C11, C12, C13, C14 470uF Capacitor, 6.3V, 20%, Tantalum C16, C19 0.100uF C17, C18 10.0uF C20 1.00uF C21 47.0pF D1 40V JP1, JP2, JP3 - JP1-1, JP2-1, JP3 1.06uH L2 22uH ...
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... Refer to the following application notes for detailed guidelines and suggestions when implementing iPOWIR Technology products: AN-1028: Recommended Design, Integration and Rework Guidelines for International Rectifier’s iPOWIR Technology BGA Packages This paper discusses the assembly considerations that need to be taken when mounting iPOWIR BGA’s on printed circuit boards ...
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XXXX XXXX iP1001 iP1001 20mm NOTES: 1. OUTLINE CONFORMS TO EIA-481 & EIA-541. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 18 0123 XXXX iP1001 TOP Part Marking 24mm FEED DIRECTION ...