ISL8105BEVAL1Z Intersil, ISL8105BEVAL1Z Datasheet - Page 3

• Manufacturer Part Number: ISL8105BEVAL1Z
• Description: EVAL BOARD ISL8105B
• Manufacturer: Intersil

Specifications of ISL8105BEVAL1Z

• Main Purpose: DC/DC, Step Down
• Outputs And Type: 1, Non-Isolated
• Voltage - Output: 1.8V
• Current - Output: 15A
• Voltage - Input: 9.6 ~ 14.4V
• Regulator Topology: Buck
• Frequency - Switching: 300kHz
• Board Type: Fully Populated
• Utilized Ic / Part: ISL8105B
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

With Infineon’s BSC030N03LS as the low-side MOSFET and
R
board has been set to 21A for 12V
Feedback Compensator
Type-III network is recommended for compensating the
feedback loop. Figure 1 shows Type-III compensation
configuration for ISL8105B.
With the inductor and output capacitor selected as described
in the previous sections, the poles and zero of the power
stage can be summarized in Equation 15:
R
R
F
1. With a value of 11.8kΩ for R
2. With the desired feedback loop bandwidth of 30kHz, R
BSOC
ESR
4
2
FIGURE 1. VOLTAGE-MODE BUCK CONVERTER
F
output voltage of 1.8V using Equation 16:
=
can be calculated using Equation 17:
=
CIRCUIT
0
PWM
R
------------------------------------------- -
d
=
V
=
=
=
max
1
of 1.74kΩ. The overcurrent trip point on the evaluation
OSC
------------------------------------ -
2
------------------------------------------ -
2
×
12kΩ
5.9kΩ
COMP
×
×
-------------------------------- -
V
⋅
OUT
π
π
V
⋅
COMPENSATION DESIGN
×
R
IN
×
V
1
HALF-BRIDGE
1
C
1
ref
OSCILLATOR
⋅
–
⋅
L
V
F
×
F
V
OSC
LC
E/A
×
DRIVE
ESR
0
ref
C
R
ISL8105B
2
=
C
=
+
3.7kHz
-
VREF
2
33.9kHz
C
1
3
FB
BGATE
TGATE
1
EXTERNAL CIRCUIT
, select R
BIAS
LX
R
R
3
V
(17A for 5V
4
IN
R
1
4
C
L
for the target
3
DCR
Application Note 1288
V
BIAS
ESR
OUT
C
(EQ. 15)
(EQ. 16)
(EQ. 17)
).
2
A more detailed explanation of designing compensation
networks for buck converters with voltage mode control can
be found in TB417 entitled “Designing Stable Compensation
Networks for Single Phase Voltage Mode Buck Regulators”.
Evaluation Board Performance
Figure 2 shows a photograph of the ISL8105BEVAL1Z.
Power and Load Connections
Terminals J1 and J2 are connected to the input of the power
stage. The IC bias supply and the converter input supply can
be together through pin 2 and 3 of the Jumper J7 to provide
single rail supply application. When using separate supplies,
provide the IC bias voltage to terminal J2 with pin 2 and pin 1
of J7 connected together. The load can be connected to
terminal J4 and J5. TP6 and TP3 can be used for DMM to
measure output voltage. The scope probe terminal (TPV01)
can be used to monitor V
switch, SW1, can be used to disable the controller.
C
C
C
3. Select C
4. Select C
5. Select R
2
3
1
R
F
=
=
=
3
LC
----------------------------------------------------------- -
2π R
--------------------------------------------- -
2π R
------------------------------------------- -
2π R
=
):
≈
------------------------------- -
150
--------------------- - 1
⋅
⋅
⋅
10nF
≈
F
2
3
2
390pF
LC
×10
1
2
3
R
⋅
⋅
1
⋅
1
C
150
1.5
such that F
such that F
such that F
1
C
3
1
1
FIGURE 2. ISL8105BEVAL1Z
–
×10
⋅
×10
F
ESR
≈
3
3
301Ω
≈
–
3.3nF
OUT
1
Z1
P1
Z2
is located at 1.5kHz (~50% of
is located at F
is located at F
with an oscilloscope. The push
LC
ESR
:
:
October 30, 2008
(EQ. 18)
(EQ. 19)
(EQ. 20)
AN1288.1