SI3400-EVB Silicon Laboratories Inc, SI3400-EVB Datasheet - Page 15
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SI3400-EVB
Manufacturer Part Number
SI3400-EVB
Description
BOARD EVAL FOR SI3400
Manufacturer
Silicon Laboratories Inc
Type
PWM Controllersr
Datasheet
1.SI3400-E1-GM.pdf
(20 pages)
Specifications of SI3400-EVB
Mfg Application Notes
SI3400/01 High Power AppNote Si3400/1 PoE PD Controllers AppNote
Main Purpose
Special Purpose DC/DC, Power Over Ethernet
Outputs And Type
1, Non-Isolated
Voltage - Output
5V
Voltage - Input
44 ~ 57V
Regulator Topology
Buck
Frequency - Switching
350kHz
Board Type
Fully Populated
Utilized Ic / Part
Si3400
Input Voltage
5 V
Output Voltage
3.3 V
Interface Type
Ethernet
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Product
Power Management Modules
For Use With/related Products
Si3400
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Output
-
Power - Output
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1352
SI3400-EVB
SI3400-EVB
4. Pin Descriptions
9, Pad
Pin#
10
12
13
14
15
16
17
18
19
20
11
1
2
3
4
5
6
7
8
ISOSSFT
EROUT
VPOSF
VPOSS
PLOSS
VNEG
Name
RDET
SSFT
VSSA
VSS1
VSS2
SWO
HSO
VDD
RCL
SP2
SP1
CT2
CT1
FB
Table 11. Si3400 and Si3401 Pin Descriptions (Top View)
Error-amplifier output and PWM input; directly connected to opto-coupler in isolated application.
Soft-start output pin ramps voltage across external soft-start capacitor to allow switcher to ramp
output slowly.
5 V supply rail for switcher; provides drive for opto-coupler.
0.1 µF capacitor between this pin and VSSA for isolated applications.
Early power loss indicator; open drain output is pulled to VPOS when VPORT is applied.
Input pin for external precision detection resistor; also used for establishing absolute current ref-
erence.
Hotswap switch output; connects to VNEG through hotswap switch.
Input pin for external precision classification resistor; float if optional RCLASS is unused.
Rectified high-voltage supply, negative rail. Must be connected to thermal PAD node (VNEG)
on package bottom. This thermal pad must be connected to VNEG (pin #9) as well as a 2 in
heat spreader plane using a minimum of nine thermal vias.
High-voltage supply input from spare pair; polarity-insensitive.
High-voltage supply input from spare pair; polarity-insensitive.
Rectified high-voltage supply, positive rail (force node)
High-voltage supply input from center tap of Ethernet transformer; polarity-insensitive.
High-voltage supply input from center tap of Ethernet transformer; polarity-insensitive.
Analog ground.
Rectified high-voltage supply, positive rail sense node.
Negative supply rail for switcher; externally tied to HSO.
Switching transistor output; drain of switching N-FET.
Negative supply rail for switcher; externally tied to HSO.
Regulated feedback input in non-isolated application.
Isolated mode soft start enable input. Tie to VDD for non-isolated applications. Connect a
ISOSSFT
EROUT
SSFT
VDD
1
2
3
4
20
5
19
6
Rev. 0.9
18
VNEG
(PAD)
7
17
8
16
9
Description
15
10
14
13
12
11
CT2
CT1
VPOSF
SP1
Si3400/Si3401
15
2