LP3906SQ-JXXIEV National Semiconductor, LP3906SQ-JXXIEV Datasheet - Page 7
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LP3906SQ-JXXIEV
Manufacturer Part Number
LP3906SQ-JXXIEV
Description
BOARD EVALUATION LP3906SQ-JXXI
Manufacturer
National Semiconductor
Series
PowerWise®r
Datasheets
1.LP3906SQ-DJXINOPB.pdf
(40 pages)
2.LP3906SQ-JXXIEV.pdf
(18 pages)
3.LP3906SQ-JXXIEV.pdf
(40 pages)
Specifications of LP3906SQ-JXXIEV
Main Purpose
DC/DC, Step Down with LDO
Outputs And Type
4, Non-Isolated
Current - Output
1.5A, 1.5A, 300mA, 300mA
Regulator Topology
Buck
Frequency - Switching
2MHz
Board Type
Fully Populated
Utilized Ic / Part
LP3906
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Voltage - Output
-
Voltage - Input
-
Power - Output
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
V
V
ΔV
I
V
PSRR
θn
I
14)
T
C
V
Eff
I
f
I
I
R
R
T
C
C
SC
Q
SHDN
OSC
PEAK
Q
ON
ON
IN
OUT
IN
OUT
OUT
DSON
DSON
IN
O
Low Drop Out Regulators, LDO1 and LDO2
Unless otherwise noted, V
25°C. Limits appearing in boldface type apply over the entire junction temperature range for operation, −40°C to +125°C. (Notes
2, 7, 8, 9, 10, 11, 12)
Buck Converters SW1, SW2
Unless otherwise noted, V
type apply for T
C to +125°C. (Notes 2, 7, 8, 9, 14)
(Note 14)
(Notes 11,
OUT
Symbol
– V
Symbol
Accuracy Output Voltage Accuracy (Default V
(P)
(N)
OUT
Output Voltage Accuracy
Line Regulation
Load Regulation
Efficiency
Shutdown Supply Current
Sync Mode Clock Frequency
Internal Oscillator Frequency
Peak Switching Current Limit
Quiescent Current “On”
Pin-Pin Resistance PFET
Pin-Pin Resistance NFET
Turn On Time
Input Capacitor
Output Capacitor
Operational Voltage Range
Line Regulation
Load Regulation
Short Circuit Current Limit
Dropout Voltage
Power Supply Ripple Rejection
Supply Output Noise
Quiescent Current “On”
Quiescent Current “On”
Quiescent Current “Off”
Turn On Time
Output Capacitor
J
= 25°C. Limits appearing in boldface type apply over the entire junction temperature range for operation, −40°
IN
IN
= 3.6, C
Parameter
= 3.6, C
Parameter
IN
IN
= 10 µF, C
= 1.0 µF, C
OUT
OUT
OUT
= 10 µF, L
= 0.47 µF. Typical values and limits appearing in normal type apply for T
) Load current = 1 mA
Default V
2.7< V
I
100 mA < I
Load Current = 250 mA
EN is de-asserted
Synchronized from 13 MHz system
clock
No load PFM Mode
Start up from shut-down
Capacitance for stability
Capacitance for stability
O
VINLDO1 and VINLDO2 PMOS
pins(Note 15)
V
(Note 12), Load Current = 1 mA
V
Load Current = 1 mA to I
LDO1-2, V
Load Current = 50 mA
(Note 10)
F = 10 kHz, Load Current = I
10 Hz < F < 100 KHz
I
I
EN is de-asserted(Note 16)
Start up from shut-down
Capacitance for stability
0°C
−40°C
ESR
=10 mA
OUT
OUT
IN
IN
= (V
= 3.6V,
≤
IN
= 0 mA
= I
OUT
T
< 5.5
7
≤
OUT
MAX
OUT
J
O
T
= 2.2 µH ceramic. Typical values and limits appearing in normal
Conditions
≤
Conditions
OUT
J
< I
125°C
+ 0.3V) to 5.0V,
≤
MAX
125°C
= 0V
MAX
MAX
1.74
0.33
0.68
Min
Min
−3
10
10
−3
5
0.0013
0.089
0.01
0.03
0.47
Typ
200
180
500
Typ
500
300
2.0
2.0
2.0
1.0
96
33
25
45
80
40
60
0.011
Max
Max
0.15
200
500
5.5
+3
3
www.national.com
µVrms
%/mA
%/mA
Units
Units
MHz
MHz
%/V
%/V
mΩ
mΩ
mΩ
mA
mV
µA
µA
µF
µF
dB
µA
µA
µA
µF
µF
µs
µs
%
%
%
J
A
V
=