ISL6455EVAL1Z Intersil, ISL6455EVAL1Z Datasheet

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ISL6455EVAL1Z

Manufacturer Part Number
ISL6455EVAL1Z
Description
EVALUATION BOARD FOR ISL6455
Manufacturer
Intersil
Datasheets

Specifications of ISL6455EVAL1Z

Main Purpose
DC/DC, Step Down with LDO
Outputs And Type
3, Non-Isolated
Voltage - Output
1.2V, 1.8V, 2.5V
Current - Output
200mA, 200mA, 200mA
Voltage - Input
5V
Regulator Topology
Buck
Frequency - Switching
750kHz
Board Type
Fully Populated
Utilized Ic / Part
ISL6455
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
The ISL6455 is a highly integrated triple output regulator
which provides a single chip solution for FPGAs and wireless
chipset power management. The device integrates a high
efficiency synchronous buck regulator (adjustable) with two
ultra low noise LDO regulators (adjustable). Either the
ISL6455 or ISL6455A can be selected based on whether
3.3V ±10% or 5V ±10% is required as an input voltage.
The synchronous current mode control PWM regulator with
integrated N-Channel and P-Channel power MOSFET
provides adjustable voltages based on external resistor
setting. Synchronous rectification with internal MOSFETs is
used to achieve higher efficiency and reduced number of
external components. Operating frequency is typically
750kHz allowing the use of smaller inductor and capacitor
values. The device can be synchronized to an external clock
signal in the range of 500kHz to 1MHz. The PG_PWM
output indicates loss of regulation on PWM output.
The ISL6455 also has two LDO adjustable regulators using
internal PMOS transistors as pass devices. LDO2 features
ultra low noise typically below 30µV
The EN_LDO pin controls LDO1 and LDO2 outputs. The
ISL6455 also integrates a RESET function, which eliminates
the need for additional RESET IC required in WLAN and
other applications. The IC asserts a RESET signal whenever
the V
keeping it asserted for at least 25ms after V
above the reset threshold. The PG_LDO output indicates
loss of regulation on either of the two LDO outputs. Other
features include overcurrent protection and thermal
shutdown for all the three outputs.
High integration and the thin Quad Flat No-lead (QFN)
package makes ISL6455 an ideal choice for powering
FPGAs and small form factor wireless cards such as
PCMCIA, mini-PCI and Cardbus-32.
Ordering Information
*Add “-TK” or T5K suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
ISL6455IRZ
ISL6455AIRZ 64 55AIRZ
NUMBER*
(Note)
PART
IN
supply voltage drops below a preset threshold,
64 55IRZ
MARKING
PART
RANGE (°C)
-40 to +85
-40 to +85
®
TEMP.
1
RMS
Application Note
24 Ld QFN 4x4 L24.4x4B
24 Ld QFN 4x4 L24.4x4B
PACKAGE
(Pb-Free)
to aid VCO stability.
IN
ISL6455EVAL1Z: 600mA Synchronous Buck
has risen
DWG. #
PKG.
1-888-INTERSIL or 1-888-468-3774
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Regulator with Integrated MOSFETs
Features
• Fully integrated synchronous buck regulator + dual LDO
• PWM output voltage adjustable.
• High output current. . . . . . . . . . . . . . . . . . . . . . . . . 600mA
• Dual LDO adjustable options
• Ultra-compact DC/DC converter design
• Stable with small ceramic output capacitors and no load
• High conversion efficiency
• Low shutdown supply current
• Low dropout voltage for LDOs
• Low output voltage noise
• PG_LDO and PG_PWM (PWM and LDO) outputs
• Extensive circuit protection and monitoring features
• Integrated RESET output for microprocessor reset
• Proven reference design for total WLAN system solution
• QFN package
• Pb-free plus anneal available (RoHS compliant)
Applications
• WLAN cards
• Hand-held instruments
Related Literature
• TB363 - Guidelines for Handling and Processing Moisture
• TB389 - PCB Land Pattern Design and Surface Mount
- 0.8V to 2.5V with ISL6455 (V
- 0.8V to 3.3V with ISL6455A (V
- LDO1, 1.2V to V
- LDO2, 1.2V to V
- LDO1 . . . . . . . . . . . . . . . . . . 150mV (typical) at 300mA
- LDO2 . . . . . . . . . . . . . . . . . . 150mV (typical) at 300mA
- <30µV
- PWM overvoltage protection
- Overcurrent protection
- Shutdown
- Thermal shutdown
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat
- Near Chip-Scale package footprint Improves PCB
- PCMCIA, Cardbus32, MiniPCI cards
- Compact flash cards
Sensitive Surface Mount Devices (SMDs)
Guidelines for QFN Packages
No Leads - Product Outline
efficiency and is thinner in Profile
All other trademarks mentioned are the property of their respective owners.
May 23, 2007
|
RMS
Intersil (and design) is a registered trademark of Intersil Americas Inc.
(typical) for LDO2 (VCO supply)
Copyright Intersil Americas Inc. 2007. All Rights Reserved
IN
IN
- 0.3V (3.3V
- 0.3V (3.3V
IN
IN
MAX
MAX
= 3.3V)
= 5.0V)
) . . . . . . . . . 300mA
) . . . . . . . . . 300mA
AN1327.0

Related parts for ISL6455EVAL1Z

ISL6455EVAL1Z Summary of contents

Page 1

... SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 ISL6455EVAL1Z: 600mA Synchronous Buck Regulator with Integrated MOSFETs Features • Fully integrated synchronous buck regulator + dual LDO • PWM output voltage adjustable. ...

Page 2

Pinout 2 Application Note 1327 ISL6455, ISL6455A (24 LD QFN) TOP VIEW SGND FB_LDO2 2 3 FB_LDO1 CC1 4 GND_LDO 5 VOUT1 GND 17 CT ...

Page 3

... ISL6455A (V 0.45 ---------- - OUT OUT1 V = OUT2 Frequency The ISL6455EVAL1Z and ISL6455AEVAL1Z can operate at a switching frequency of 750kHZ, however, the switching frequency can adjust from 500kHz to1MHz by using the sync pin (P9 Center post to right Connect VIN_LDO to VOUT 2 Center post to left . OUT2 . OUT2 OUT = 1 ...

Page 4

Schematic VIN P1 600MA P2 GND R12 R8 10K 10K P8 PG_PWM P9 SYNC C2 R7 0.033UF 10K E P12 PG_LDO P10 RESET VOUT IN JP1 P13 VIN_LDO U1 ISL6455/A VIN +3.3V VOUT +2.5V VOUT1 +1.8V VOUT2 +1.2V L1A 8.2UH ...

Page 5

... TABLE 2. COMPONENT LIST ISL6455EVAL1Z, ISL6455AEVAL1Z REF DES QTY VALUE TOL 0.01µF 10% C8, 4 0.1µF 10% C11-C13 C9 1 1µF 20% C2 33000pF 10% C3, C4 10µF 10 4.7V 10% C10 1 10µf 10% L1A 1 8.2µH 20 3.3V to 5.5V R9-R11 3 0Ω R7, R8, R12 3 10k 11k 2.37k ...

Page 6

ISL6455AEVAL1Z Board Layout 6 Application Note 1327 FIGURE 1. TOP COMPONENTS FIGURE 2. TOP LAYER ETCH AN1327.0 May 23, 2007 ...

Page 7

ISL6455AEVAL1Z Board Layout 7 Application Note 1327 (Continued) FIGURE 3. 2ND LAYER ETCH FIGURE 4. 3RD LAYER ETCH AN1327.0 May 23, 2007 ...

Page 8

... ISL6455AEVAL1Z Board Layout Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com ...

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