DP83848C-POE-EK National Semiconductor, DP83848C-POE-EK Datasheet - Page 8

• Manufacturer Part Number: DP83848C-POE-EK
• Description: BOARD EVALUATION DP83848C
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of DP83848C-POE-EK

• Main Purpose: Special Purpose DC/DC, Power Over Ethernet
• Outputs And Type: 1, Isolated
• Power - Output: 24W
• Voltage - Output: 3.3V
• Current - Output: 7.3A
• Voltage - Input: 39 ~ 57V
• Regulator Topology: Flyback
• Frequency - Switching: 250kHz
• Board Type: Fully Populated
• Utilized Ic / Part: LM5072
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

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Source Power
To fully test the evaluation board, either a high power PSE
able to supply 30W or a lab bench DC power supply capable
of at least 60V and 1A is required for the PoE input. For the
AUX source power, use a 24V AC adapter or a DC power
supply capable of 30V and 3A. Use the output over-voltage
and over-current limit features of the bench power supplies to
protect the board against damage by errant connections.
Loading/Current Limiting Behavior
A resistive load is optimal, but an appropriate electronic load
specified for operation down to 2.0V is acceptable. The max-
imum load current is 7.3A. Exceeding this current at low input
voltage may cause oscillatory behavior as the circuit will go
into current limit mode. Exceeding this current at high input
voltage may force the DC-DC converter to run into cycle by
cycle peak current limit. Current limit mode is triggered when-
ever the average current through the PoE connector exceeds
800 mA (setting is determined by RE23, see the LM5072
datasheet for details). The circuit then runs into a retry mode
(hiccups). Cycle-by-cycle peak current limit mode narrows the
duty cycle and hence the output voltage loses regulation and
enters an under voltage condition. In both current limit modes,
the circuit will not be latched off and normal operation will be
automatically restored after the removal of the fault condition.
Power Up
For the first time power up, it is recommended to apply PoE
power first. The load should be kept reasonably low (under
25% of full load). Check the supply current during signature
detection and classification modes before applying full power.
During detection mode, the module should have the I-V char-
acteristics of a 25 kΩ resistor in series with two diodes. During
classification mode, the current draw should be about 40 mA
at 16V, which is determined by RE22 of 31.6Ω. This sets the
evaluation board to Class 4, which is “reserved for future use”
per IEEE 802.3af, namely the high power application. If the
proper response is not observed during both detection and
classification modes, check the connections closely. If no cur-
rent is flowing it is likely that the set of conductors feeding PoE
power have been incorrectly installed. Once the proper setup
has been established, full power can be applied. A voltmeter
across the output terminals JE5 (3.3V) and JE6 (3.3V RTN)
will allow direct measurement of the 3.3V output line. If the
3.3V output voltage is not observed within a few seconds, turn
off the power supply and review connections. A final check of
efficiency is the best way to confirm that the circuit is operating
properly. Efficiency being significantly lower than 80% at full
load indicates a problem.
After proper PoE operation is verified, the user may apply
AUX power. It is recommended that the application of AUX
power follow the same precautions as those for PoE power
application. If no output voltage is observed, it is likely that the
AUX power feed polarity is reversed. After successful opera-
tion is observed, full AUX power testing can begin.
PD Interface Operating Modes
When connecting into the PoE system, the evaluation board
will go through the following operating modes in sequence:
PD signature detection, power level classification (optional),
and application of full power. See the LM5072 datasheet for
details.
8
Signature Detection
The 25 kΩ PD signature resistor is integrated into the LM5072
IC. The PD signature capacitor is realized by CE29, a 100 nF
capacitor. During AUX power operation, CE29 also improves
the noise immunity of the IC substrate (interconnected to the
VEE pin) by providing a low impedance path to the COM
node.
It should be noted that when AUX power is applied first, it will
not allow the PSE to identify the PD as a valid device because
the AUX voltage will cause the current steering diode bridges
BR1 and BR2 to be reverse biased during detection mode.
This prevents the PSE from applying power, so the evaluation
board will only draw current from the AUX source.
Classification
PD classification is implemented with RE22. The evaluation
board is preset to Class 4 by installing a resistor of 31.6Ω at
RE22, indicating that the power consumption of the evalua-
tion board exceeds the 12.95W limit per IEEE 802.3af.
Input UVLO and UVLO Hysteresis
The input Under Voltage Lock-Out (UVLO) is an integrated
function of the LM5072. The UVLO release threshold is set to
approximately 38.5V (at the pins of the IC) and the UVLO
hysteresis is approximately 7V.
Inrush and DC Current Limit
Programming
The LM5072 allows the user to independently program the
inrush and DC current limits of the internal hot swap MOS-
FET. The evaluation board sets the inrush limit to the default
150 mA by leaving RE19 unpopulated, and the DC current
limit to 800 mA by installing a 15.8 kΩ resistor at RE23. To
adjust the inrush and DC current limits, use proper resistors
for RE19 and RE23, respectively, according to the recom-
mendations in the LM5072 datasheet.
Auxiliary Power Option
In this evaluation board, the AUX power is configured into the
AUX dominant mode. Please refer to the LM5072 datasheet
for details.
During AUX dominance, the AUX power source will always
supply the current to the PD regardless whether the PoE
power is present or not. Note that auxiliary non-dominance
does not imply PoE dominance. To achieve PoE dominance,
additional circuitry must be employed. Contact National Semi-
conductor for a schematic of a robust PoE dominant solution.
Because the AUX input bypasses the LM5072’s input hot
swap circuit, the evaluation board uses eight 8.06Ω resistors
(RE1A through RE1D and RE2A through RE2D) in parallel to
achieve a low cost AUX inrush limiter and transient protection.
Otherwise the unlimited inrush currents can wear on-board
traces, connector contacts, and various board components,
as well as create damaging transient voltages. Nevertheless,
these eight resistors will cause power loss in the AUX power
mode, and they also reduce the effective AUX input voltage
level sensed by the VIN pin of the LM5072. A more efficient
and generally better performing AUX inrush limiter can be
achieved with additional circuitry employing a bipolar transis-
tor or MOSFET. Contact National Semiconductor for support.