EVAL-AD5660DKZ Analog Devices Inc, EVAL-AD5660DKZ Datasheet - Page 7

• Manufacturer Part Number: EVAL-AD5660DKZ
• Description: BOARD DEMO FOR AD5660
• Manufacturer: Analog Devices Inc
• Series: nanoDAC™r

Specifications of EVAL-AD5660DKZ

• Number Of Dac's: 1
• Number Of Bits: 16
• Outputs And Type: 1, Single Ended
• Sampling Rate (per Second): 125k
• Data Interface: Serial
• Settling Time: 8µs
• Dac Type: Voltage
• Voltage Supply Source: Single
• Operating Temperature: -40°C ~ 105°C
• Utilized Ic / Part: AD5660
• Silicon Manufacturer: Analog Devices
• Application Sub Type: DAC
• Kit Application Type: Data Converter
• Silicon Core Number: AD5660
• Kit Contents: Board
• Silicon Family Name: NanoDAC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

TIMING CHARACTERISTICS
All input signals are specified with tr = tf = 1 ns/V (10% to 90% of V
V
Table 4.
Parameter
t
t
t
t
t
t
t
t
t
t
1
1
2
3
4
5
6
7
8
9
10
Maximum SCLK frequency is 30 MHz at V
1
DD
= 2.7 V to 5.5 V; all specifications T
SYNC
SCLK
DIN
LSB = DB0
MSB = DB23 FOR AD5660
MSB = DB15 FOR AD5620/AD5640
V
50
13
13
13
5
4.5
0
50
13
0
DD
= 2.7 V to 3.6 V
t
8
t
10
MSB
DD
= 3.6 V to 5.5 V and 20 MHz at V
Limit at T
t
4
MIN
t
5
to T
t
6
MIN
V
33
13
13
13
5
4.5
0
33
13
0
MAX
DD
, T
, unless otherwise noted.
t
= 3.6 V to 5.5 V
MAX
3
Figure 2. Serial Write Operation
t
1
Rev. F | Page 7 of 28
t
2
DD
= 2.7 V to 3.6 V.
DD
LSB
) and timed from a voltage level of (V
t
7
t
9
ns min
Unit
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
Conditions/Comments
SCLK cycle time
SCLK high time
SCLK low time
SYNC to SCLK falling edge setup time
Data setup time
Data hold time
SCLK falling edge to SYNC rising edge
Minimum SYNC high time
SYNC rising edge to SCLK fall ignore
SCLK falling edge to SYNC fall ignore
AD5620/AD5640/AD5660
IL
+ V
IH
)/2. See Figure 2.