EVAL-AD5371EBZ Analog Devices Inc, EVAL-AD5371EBZ Datasheet - Page 18

• Manufacturer Part Number: EVAL-AD5371EBZ
• Description: BOARD EVAL FOR AD5371
• Manufacturer: Analog Devices Inc

Specifications of EVAL-AD5371EBZ

• Number Of Dac's: 40
• Number Of Bits: 14
• Outputs And Type: 40, Single Ended
• Sampling Rate (per Second): 540k
• Data Interface: Serial
• Settling Time: 20µs
• Dac Type: Voltage
• Voltage Supply Source: Dual ±
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD5371
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD5371
OUTPUT AMPLIFIER
The output amplifiers can swing to 1.4 V below the positive
supply and 1.4 V above the negative supply, which limits how
much the output can be offset for a given reference voltage. For
example, it is not possible to have a unipolar output range of
20 V, because the maximum supply voltage is ±16.5 V.
Figure 22 shows details of a DAC output amplifier and its
connections to its corresponding offset DAC. On power-up,
S1 is open, disconnecting the amplifier from the output. S3 is
closed, so the output is pulled to the corresponding SIGGNDx
(R1 and R2 are greater than R6). S2 is also closed to prevent the
output amplifier from being open-loop. If CLR is low at power-up,
the output remains in this condition until CLR is taken high.
The DAC registers can be programmed, and the outputs assume
the programmed values when CLR is taken high. Even if CLR is
high at power-up, the output remains in this condition until
V
finished. The outputs then go to their power-on default value.
TRANSFER FUNCTION
The output voltage of a DAC in the AD5371 is dependent on the
value in the input register, the value of the M and C registers,
and the value in the offset DAC.
DD
SIGGNDx
VOLTAGE
> 6 V and V
OUTPUT
–4V
8V
OFFSET
DAC
0
Figure 22. Output Amplifier and Offset DAC
60kΩ
R4
SS
Figure 23. DAC Transfer Function
ACTUAL
TRANSFER
FUNCTION
< −4 V and the initialization sequence has
CHANNEL
20kΩ
R3
ZERO-SCALE
ERROR
DAC
DAC CODE
60kΩ
20kΩ
R2
20kΩ
R5
R1
CLR
S2
IDEAL
TRANSFER
FUNCTION
16383
CLR
S1
SIGGNDx
FULL-SCALE
ERROR
+
ZERO-SCALE
ERROR
R6
10kΩ
S3
CLR
VOUT
Rev. B | Page 18 of 28
The input code is the value in the X1A or X1B register that is
applied to the DAC (X1A, X1B default code = 5461).
where:
M = code in gain register − default code = 2
C = code in offset register − default code = 2
The DAC output voltage is calculated as follows:
where:
DAC_CODE should be within the range of 0 to 16,383.
VREF = 3.0 V for a 12 V span and 5.0 V for a 20 V span.
OFFSET_CODE is the code loaded to the offset DAC. On
power-up, the default code loaded to the offset DAC is 5461
(0x1555). With a 3 V reference, this gives a span of −4 V to +8 V.
REFERENCE SELECTION
The AD5371 has three reference input pins. The voltage applied
to the reference pins determines the output voltage span on
VOUT0 to VOUT39. VREF0 determines the voltage span for
VOUT0 to VOUT7 (Group 0), VREF1 determines the voltage
span for VOUT8 to VOUT15 (Group 1), and VREF2 deter-
mines the voltage span for VOUT16 to VOUT39 (Group 2 to
Group 4). The reference voltage applied to each VREF pin can
be different, if required, allowing each group to have a different
voltage span. The output voltage range and span can be adjusted
further by programming the offset and gain registers for each
channel and by programming the offset DACs. If the offset and
gain features are not used (that is, the M and C registers are left
at their default values), the required reference levels can be
calculated as follows:
If the offset and gain features of the AD5371 are used, the
required output range is slightly different. The selected output
range should take into account the system offset and gain errors
that need to be trimmed out. Therefore, the selected output
range should be larger than the actual required range.
Calculate the required reference levels as follows:
1.
2.
3.
4.
5.
DAC_CODE = INPUT_CODE × (M + 1)/2
VOUT = 4 × VREFx × (DAC_CODE –
OFFSET_CODE)/2
VREF = (VOUT
Identify the nominal output range on VOUT.
Identify the maximum offset span and the maximum gain
required on the full output signal range.
Calculate the new maximum output range on VOUT,
including the expected maximum offset and gain errors.
Choose the new required VOUT
the VOUT limits centered on the nominal values. Note that
V
Calculate the value of VREF as follows:
VREF = (VOUT
DD
and V
SS
must provide sufficient headroom.
MAX
MAX
14
− VOUT
− VOUT
+ V
SIGGND
MIN
MIN
)/4
)/4
MAX
and VOUT
14
13
− 1.
.
14
+ C − 2
MIN
, keeping
13
.