CDB4392 Cirrus Logic Inc, CDB4392 Datasheet - Page 14

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CDB4392

Manufacturer Part Number
CDB4392
Description
EVALUATION BOARD FOR CS4392
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB4392

Number Of Dac's
2
Number Of Bits
24
Outputs And Type
2, Differential
Sampling Rate (per Second)
192k
Data Interface
Serial
Dac Type
Voltage
Voltage Supply Source
Analog and Digital
Operating Temperature
-10°C ~ 70°C
Utilized Ic / Part
CS4392
Description/function
Audio D/A
Operating Supply Voltage
5 V
Product
Audio Modules
For Use With/related Products
CS4392
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
4. CONTROL PORT INTERFACE
The control port is used to load all the internal register settings (see section 6). The operation of the control
port may be completely asynchronous with the audio sample rate. However, to avoid potential interference
problems, the control port pins should remain static if no operation is required.
The control port operates in one of two modes: I
or SPI.
Notes: MCLK must be applied during all I
14
4.0.1
The device has MAP (memory address pointer) auto increment capability enabled by the INCR bit
(also the MSB) of the MAP. If INCR is set to 0, MAP will stay constant for successive I
or reads, and SPI writes. If INCR is set to 1, MAP will auto increment after each byte is written,
allowing block reads or writes of successive registers.
4.0.2
In the I
the serial control port clock, SCL (see Figure 8 for the clock to data relationship). There is no CS
pin. Pin AD0 enables the user to alter the chip address (001000[AD0][R/W]) and should be tied to
VL or AGND as required, before powering up the device. If the device ever detects a high to low
transition on the AD0/CS pin after power-up, SPI mode will be selected.
2
4.0.2a
To write to the device, follow the procedure below while adhering to the control port
Switching Specifications in section 7.
1) Initiate a START condition to the I
must be 001000. The seventh bit must match the setting of the AD0 pin, and the eighth must
be 0. The eighth bit of the address byte is the R/W bit.
2) Wait for an acknowledge (ACK) from the part, then write to the memory address pointer,
MAP. This byte points to the register to be written.
3) Wait for an acknowledge (ACK) from the part, then write the desired data to the register
pointed to by the MAP.
4) If the INCR bit (see section 4.0.1) is set to 1, repeat the previous step until all the desired
registers are written, then initiate a STOP condition to the bus.
5) If the INCR bit is set to 0 and further I
essary to initiate a repeated START condition and follow the procedure detailed from step
1. If no further writes to other registers are desired, initiate a STOP condition to the bus.
C mode, data is clocked into and out of the bi-directional serial control data line, SDA, by
MAP Auto Increment
I
2
C Mode
I
2
C Write
2
C communication.
2
C
2
C bus followed by the address byte. The upper 6 bits
2
C writes to other registers are desired, it is nec-
CS4392
DS459PP3
2
C writes

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