LM2754SQEV National Semiconductor, LM2754SQEV Datasheet - Page 10
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LM2754SQEV
Manufacturer Part Number
LM2754SQEV
Description
BOARD EVALUATION LM2754SQ
Manufacturer
National Semiconductor
Series
PowerWise®r
Specifications of LM2754SQEV
Current - Output / Channel
800mA
Outputs And Type
4, Non-Isolated
Voltage - Output
5.1V
Features
Charge Pump
Voltage - Input
2.7 ~ 5.5V
Utilized Ic / Part
LM2754
Core Chip
LM2754
Topology
Charge Pump
No. Of Outputs
1
Output Current
800mA
Input Voltage
2.8V To 5.5V
Kit Contents
Board
Development Tool Type
Hardware - Eval/Demo Board
Lead Free Status / RoHS Status
Not applicable / Not applicable
www.national.com
Application Information
THERMAL PROTECTION
Internal thermal protection circuitry disables the LM2754
when the junction temperature exceeds 150˚C (typ.). This
feature protects the device from being damaged by high die
temperatures that might otherwise result from excessive
power dissipation. The device will recover and operate nor-
mally when the junction temperature falls below 120˚C (typ.).
It is important that the board layout provide good thermal
conduction to keep the junction temperature within the speci-
fied operating ratings.
POWER DISSIPATION
The power dissipation (P
ture (T
is the power generated by the 1x/1.5x/2x charge pump, P
is the power consumed by the LEDs, T
temperature, and θ
sistance for the LLP-24 package. V
the LM2754, V
I
LED
is the programmed LED current.
J
= [Gain x V
) can be approximated with the equations below. P
LED
P
DISSIPATION
IN
is the nominal LED forward voltage, and
JA
x (4 x I
is the junction-to-ambient thermal re-
DISSIPATION
LED
= P
)] − (V
IN
IN
) and junction tempera-
- P
is the input voltage to
LED
LED
(Continued)
x 4 x I
A
is the ambient
LED
)
LED
IN
10
The junction temperature rating takes precedence over the
ambient temperature rating. The LM2754 may be operated
outside the ambient temperature rating, so long as the junc-
tion temperature of the device does not exceed the maxi-
mum operating rating of 125˚C. The maximum ambient tem-
perature rating must be derated in applications where high
power dissipation and/or poor thermal resistance causes the
junction temperature to exceed 125˚C.
PCB Layout Considerations
The LLP is a leadframe based Chip Scale Package (CSP)
with very good thermal properties. This package has an
exposed DAP (die attach pad) at the center of the package
measuring 2.6mm x 2.6mm. The main advantage of this
exposed DAP is to offer lower thermal resistance when it is
soldered to the thermal land on the PCB. For PCB layout,
National highly recommends a 1:1 ratio between the pack-
age and the PCB thermal land. To further enhance thermal
conductivity, the PCB thermal land may include vias to a
ground plane. For more detailed instructions on mounting
LLP packages, please refer to National Semiconductor Ap-
plication Note AN-1187.
T
J
= T
A
+ (P
DISSIPATION
x θ
JA
)