EVAL-ADT7411EBZ Analog Devices Inc, EVAL-ADT7411EBZ Datasheet - Page 14

• Manufacturer Part Number: EVAL-ADT7411EBZ
• Description: BOARD EVALUATION FOR ADT7411
• Manufacturer: Analog Devices Inc

Specifications of EVAL-ADT7411EBZ

• Sensor Type: Temperature
• Sensing Range: -40°C ~ 120°C
• Interface: DSP, I²C, MICROWIRE, QSPI, SMBus, SPI
• Sensitivity: ±0.5°C
• Voltage - Supply: 2.7 V ~ 5.5 V
• Embedded: No
• Utilized Ic / Part: ADT7411
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADT7411
FUNCTIONAL DESCRIPTION
ANALOG INPUTS
Single-Ended Inputs
The ADT7411 offers eight single-ended analog input channels.
The analog input range is from 0 V to 2.25 V or 0 V to V
maintain the linearity specification, it is recommended that the
maximum V
input ranges is done by Bit C4 of the Control Configuration 3
register (Address 1Ah). Setting this bit to 0 sets up the analog
input ADC reference to be sourced from the internal voltage
reference of 2.25 V. Setting the bit to 1 sets up the ADC
reference to be sourced from V
The ADC resolution is 10 bits and is mostly suitable for dc
input signals or very slowly varying ac signals. Bit C1 and
Bit C2 of the Control Configuration 1 register (Address 18h) are
used to set up Pin 7 and Pin 8 as AIN1 and AIN2. Figure 20
shows the overall view of the 8-channel analog input path.
Converter Operation
The analog input channels use a successive approximation ADC
based around a capacitor DAC. Figure 21 and Figure 22 show
simplified schematics of the ADC. Figure 21 shows the ADC
during acquisition phase. SW2 is closed and SW1 is in Position A.
The comparator is held in a balanced condition and the
sampling capacitor acquires the signal on AIN.
DD
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
AIN8
value be set at 5 V. Selection between the two
Figure 20. Octal Analog Input Path
M
U
L
T
P
L
E
X
E
R
I
OPTIONAL CAPACITOR, UP TO
3nF MAX. CAN BE ADDED TO
IMPROVE HIGH FREQUENCY
NOISE REJECTION IN NOISY
ENVIRONMENTS
DD
10-BIT
ADC
.
REMOTE
SENSING
TRANSISTOR
(2N3906)
Figure 23. Signal Conditioning for External Diode Temperature Sensor
TO ADC
VALUE
REGISTER
D+
C1
D–
LOW-PASS
FILTER
f
DD
C
= 65kHz
. To
Rev. B | Page 14 of 36
I
BIAS
DIODE
N × I
When the ADC eventually goes into conversion phase (see
Figure 22) SW2 opens and SW1 moves to Position B, causing
the comparator to become unbalanced. The control logic and
the DAC are used to add and subtract fixed amounts of charge
from the sampling capacitor to bring the comparator back into
a balanced condition. When the comparator is rebalanced, the
conversion is complete. The control logic generates the ADC
output code. Figure 24 shows the ADC transfer function for
single-ended analog inputs.
I
BIAS
AIN
AIN
V
DD
REF/2
REF/2
SW1
SW1
A
A
CAPACITOR
B
CAPACITOR
B
SAMPLING
Figure 21. ADC Acquisition Phase
Figure 22. ADC Conversion Phase
SAMPLING
SW2
SW2
COMPARATOR
COMPARATOR
TO ADC
V
V
OUT+
OUT–
ACQUISITION
CONVERSION
INT V
INT V
PHASE
PHASE
REF
REF
CAP DAC
CONTROL
CAP DAC
CONTROL
LOGIC
LOGIC
REF
REF
V
V
DD
DD