EVAL-ADUC842QS Analog Devices Inc, EVAL-ADUC842QS Datasheet - Page 70
EVAL-ADUC842QS
Manufacturer Part Number
EVAL-ADUC842QS
Description
KIT DEV FOR ADUC842 QUICK START
Manufacturer
Analog Devices Inc
Series
QuickStart™ Kitr
Type
MCUr
Datasheet
1.EVAL-ADUC842QS.pdf
(88 pages)
Specifications of EVAL-ADUC842QS
Contents
Evaluation Board, Power Supply, Cable, Software and Documentation
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
ADuC842
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
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ADuC841/ADuC842/ADuC843
INTERRUPT SYSTEM
The ADuC841/ADuC842/ADuC843 provide a total of nine
interrupt sources with two priority levels. The control and
configuration of the interrupt system is carried out through
three interrupt-related SFRs:
IE
IP
IEIP2
IE
SFR Address
Power-On Default
Bit Addressable
Table 35. IE SFR Bit Designations
Bit No.
7
6
5
4
3
2
1
0
IP
SFR Address
Power-On Default
Bit Addressable
Table 36. IP SFR Bit Designations
Bit No.
7
6
5
4
3
2
1
0
Name
----
PADC
PT2
PS
PT1
PX1
PT0
PX0
Name
EA
EADC
ET2
ES
ET1
EX1
ET0
EX0
Interrupt Enable Register
Interrupt Priority Register
Secondary Interrupt Enable Register
Interrupt Enable Register
A8H
00H
Yes
Description
Reserved.
Written by the user to select the ADC interrupt priority (1 = High; 0 = Low).
Written by the user to select the Timer 2 interrupt priority (1 = High; 0 = Low).
Written by the user to select the UART serial port interrupt priority (1 = High; 0 = Low).
Written by the user to select the Timer 1 interrupt priority (1 = High; 0 = Low).
Written by the user to select External Interrupt 1 priority (1 = High; 0 = Low).
Written by the user to select the Timer 0 interrupt priority (1 = High; 0 = Low).
Written by the user to select External Interrupt 0 priority (1 = High; 0 = Low).
Description
Set by the user to enable, or cleared to disable all interrupt sources.
Set by the user to enable, or cleared to disable ADC interrupts.
Set by the user to enable, or cleared to disable Timer 2 interrupts.
Set by the user to enable, or cleared to disable UART serial port interrupts.
Set by the user to enable, or cleared to disable 0 Timer 1 interrupts.
Set by the user to enable, or cleared to disable External Interrupt 1.
Set by the user to enable, or cleared to disable Timer 0 interrupts.
Set by the user to enable, or cleared to disable External Interrupt 0 .
Interrupt Priority Register
B8H
00H
Yes
Rev. 0 | Page 70 of 88
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