TWR-MCF51CN-KIT Freescale Semiconductor, TWR-MCF51CN-KIT Datasheet - Page 14
![KIT TOWER BOARD/SERIAL/ELEVATOR](/photos/9/20/92066/twr-mcf51cn-kit_sml.jpg)
TWR-MCF51CN-KIT
Manufacturer Part Number
TWR-MCF51CN-KIT
Description
KIT TOWER BOARD/SERIAL/ELEVATOR
Manufacturer
Freescale Semiconductor
Series
ColdFire®, Flexis™r
Type
MCUr
Datasheets
1.TWR-ELEV.pdf
(48 pages)
2.TWR-ELEV.pdf
(4 pages)
3.TWR-ELEV.pdf
(4 pages)
4.TWR-MCF51CN-KIT.pdf
(4 pages)
Specifications of TWR-MCF51CN-KIT
Contents
4 Boards, Cable, DVD
Processor To Be Evaluated
MCF51CN128
Data Bus Width
8 bit, 16 bit, 32 bit
Interface Type
RS-232, RS-485, Ethernet, USB, CAN
Silicon Manufacturer
Freescale
Core Architecture
Coldfire
Core Sub-architecture
Coldfire V1
Silicon Core Number
MCF51
Silicon Family Name
MCF51CN
Kit Contents
Board
Rohs Compliant
Yes
For Use With/related Products
Freescale Tower System, MCF51CN128
For Use With
TWR-ELEV - TOWER ELEVATOR BOARDS HARDWARE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Electrical Characteristics
3.5
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early CMOS circuits,
normal handling precautions should be used to avoid exposure to static discharge. Qualification tests are performed to ensure
that these devices can withstand exposure to reasonable levels of static without suffering any permanent damage.
All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade Integrated Circuits. During
the device qualification ESD stresses were performed for the human body model (HBM), the machine model (MM) and the
charge device model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device specification. Complete
DC parametric and functional testing is performed per the applicable device specification at room temperature followed by hot
temperature, unless specified otherwise in the device specification.
14
ESD Protection and Latch-Up Immunity
1
Parameter is achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted.
No.
Machine
Latch-up
1
2
3
4
Human
Model
Body
Human body model (HBM)
Machine model (MM)
Charge device model (CDM)
Latch-up current at T
Series resistance
Storage capacitance
Number of pulses per pin
Series resistance
Storage capacitance
Number of pulses per pin
Minimum input voltage limit
Maximum input voltage limit
Table 7. ESD and Latch-Up Protection Characteristics
MCF51CN128 ColdFire Microcontroller Data Sheet, Rev. 4
Table 6. ESD and Latch-up Test Conditions
Rating
Description
1
A
= 85°C
Symbol
V
V
V
I
HBM
CDM
LAT
MM
Symbol
R1
R1
—
—
—
—
C
C
± 2000
± 200
± 500
± 100
Min
Value
1500
– 2.5
100
200
7.5
3
0
3
Max
—
—
—
—
Freescale Semiconductor
Unit
pF
pF
Ω
Ω
V
V
Unit
mA
V
V
V