C8051F310DK Silicon Laboratories Inc, C8051F310DK Datasheet - Page 67

DEV KIT FOR C8051F310/F311

C8051F310DK

Manufacturer Part Number
C8051F310DK
Description
DEV KIT FOR C8051F310/F311
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F310DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F31x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F310
Silicon Family Name
C8051F31x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051, F310, 311 MCUs
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1253

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F310DK
Manufacturer:
SiliconL
Quantity:
10
6.
The voltage reference MUX on C8051F310/1/2/3/6 devices is configurable to use an externally connected
voltage reference, or the power supply voltage (see Figure 6.1). The REFSL bit in the Reference Control
register (REF0CN) selects the reference source. For an external source, REFSL should be set to ‘0’; For
V
The BIASE bit enables the internal voltage bias generator, which is used by the ADC, Temperature Sensor,
and Internal Oscillator. This bit is forced to logic 1 when any of the aforementioned peripherals is enabled.
The bias generator may be enabled manually by writing a ‘1’ to the BIASE bit in register REF0CN; see
SFR Definition 6.1 for REF0CN register details. The electrical specifications for the voltage reference cir-
cuit are given in Table 6.1.
Important Note About the VREF Input: Port pin P0.0 is used as the external VREF input. When using an
external voltage reference, P0.0 should be configured as analog input and skipped by the Digital Crossbar.
To configure P0.0 as analog input, set to ‘0’ Bit0 in register P0MDIN. To configure the Crossbar to skip
P0.0, set to ‘1’ Bit0 in register P0SKIP. Refer to
plete Port I/O configuration details.
The temperature sensor connects to the highest order input of the ADC0 positive input multiplexer (see
Section “5.1. Analog Multiplexer” on page 51
enables/disables the temperature sensor. While disabled, the temperature sensor defaults to a high imped-
ance state and any ADC0 measurements performed on the sensor result in meaningless data.
DD
as the reference source, REFSL should be set to ‘1’.
GND
VDD
Voltage Reference (C8051F310/1/2/3/6 only)
R1
Reference
External
Voltage
Circuit
Figure 6.1. Voltage Reference Functional Block Diagram
VREF
VDD
REF0CN
0
1
Section “13. Port Input/Output” on page 129
Rev. 1.7
for details). The TEMPE bit in register REF0CN
IOSCEN
C8051F310/1/2/3/4/5/6/7
EN
EN
Bias Generator
Temp Sensor
To Analog Mux
Internal
VREF
(to ADC)
To ADC, Internal
Oscillator
for com-
67

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