C8051F300DK Silicon Laboratories Inc, C8051F300DK Datasheet - Page 167

DEV KIT F300/301/302/303/304/305

C8051F300DK

Manufacturer Part Number
C8051F300DK
Description
DEV KIT F300/301/302/303/304/305
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F300DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F30x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F300
Silicon Family Name
C8051F30x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051 F300/001/002
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1246
16.4. Register Descriptions for PCA
Following are detailed descriptions of the special function registers related to the operation of the PCA.
Bit7:
Bit6:
Bits5–3: UNUSED. Read = 000b, Write = don't care.
Bit2:
Bit1:
Bit0:
R/W
CF
Bit7
CF: PCA Counter/Timer Overflow Flag.
Set by hardware when the PCA Counter/Timer overflows from 0xFFFF to 0x0000. When the
Counter/Timer Overflow (CF) interrupt is enabled, setting this bit causes the CPU to vector
to the PCA interrupt service routine. This bit is not automatically cleared by hardware and
must be cleared by software.
CR: PCA Counter/Timer Run Control.
This bit enables/disables the PCA Counter/Timer.
0: PCA Counter/Timer disabled.
1: PCA Counter/Timer enabled.
CCF2: PCA Module 2 Capture/Compare Flag.
This bit is set by hardware when a match or capture occurs. When the CCF2 interrupt is
enabled, setting this bit causes the CPU to vector to the PCA interrupt service routine. This
bit is not automatically cleared by hardware and must be cleared by software.
CCF1: PCA Module 1 Capture/Compare Flag.
This bit is set by hardware when a match or capture occurs. When the CCF1 interrupt is
enabled, setting this bit causes the CPU to vector to the PCA interrupt service routine. This
bit is not automatically cleared by hardware and must be cleared by software.
CCF0: PCA Module 0 Capture/Compare Flag.
This bit is set by hardware when a match or capture occurs. When the CCF0 interrupt is
enabled, setting this bit causes the CPU to vector to the PCA interrupt service routine. This
bit is not automatically cleared by hardware and must be cleared by software.
R/W
CR
Bit6
SFR Definition 16.1. PCA0CN: PCA Control
R/W
Bit5
R/W
Bit4
Rev. 2.9
R/W
Bit3
CCF2
R/W
Bit2
C8051F300/1/2/3/4/5
CCF1
R/W
Bit1
(bit addressable)
CCF0
R/W
Bit0
SFR Address:
00000000
Reset Value
0xD8
167

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